CONFIG_MMU=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_PPC=y
CONFIG_EARLY_PRINTK=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
# CONFIG_CPUSETS is not set
+# CONFIG_RELAY is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
# CONFIG_EMBEDDED is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_SHMEM=y
-CONFIG_CC_ALIGN_FUNCTIONS=0
-CONFIG_CC_ALIGN_LABELS=0
-CONFIG_CC_ALIGN_LOOPS=0
-CONFIG_CC_ALIGN_JUMPS=0
CONFIG_SLAB=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_KMOD=y
#
# Block layer
#
+# CONFIG_BLK_DEV_IO_TRACE is not set
#
# IO Schedulers
CONFIG_MMIO_NVRAM=y
CONFIG_CELL_IIC=y
# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
# CONFIG_CPU_FREQ is not set
# CONFIG_WANT_EARLY_SERIAL is not set
CONFIG_SPARSEMEM_EXTREME=y
# CONFIG_MEMORY_HOTPLUG is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
-CONFIG_MIGRATION=y
# CONFIG_PPC_64K_PAGES is not set
CONFIG_SCHED_SMT=y
CONFIG_PROC_DEVICETREE=y
# CONFIG_PPC_INDIRECT_PCI is not set
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
-CONFIG_PCI_LEGACY_PROC=y
# CONFIG_PCI_DEBUG is not set
#
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
CONFIG_INET_TUNNEL=y
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m
CONFIG_INET6_IPCOMP=m
+CONFIG_INET6_XFRM_TUNNEL=m
CONFIG_INET6_TUNNEL=m
CONFIG_IPV6_TUNNEL=m
CONFIG_NETFILTER=y
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_PCI=y
CONFIG_SERIAL_8250_NR_UARTS=4
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
# CONFIG_SERIAL_8250_EXTENDED is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_PROSAVAGE is not set
# CONFIG_I2C_SAVAGE4 is not set
-# CONFIG_SCx200_ACB is not set
# CONFIG_I2C_SIS5595 is not set
# CONFIG_I2C_SIS630 is not set
# CONFIG_I2C_SIS96X is not set
# CONFIG_SENSORS_PCF8574 is not set
# CONFIG_SENSORS_PCA9539 is not set
# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_SENSORS_RTC8564 is not set
# CONFIG_SENSORS_MAX6875 is not set
-# CONFIG_RTC_X1205_I2C is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
# Misc devices
#
-#
-# Multimedia Capabilities Port drivers
-#
-
#
# Multimedia devices
#
#
# CONFIG_MMC is not set
+#
+# LED devices
+#
+# CONFIG_NEW_LEDS is not set
+
+#
+# LED drivers
+#
+
+#
+# LED Triggers
+#
+
#
# InfiniBand support
#
# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
#
+#
+# Real Time Clock
+#
+# CONFIG_RTC_CLASS is not set
+
#
# File systems
#
CONFIG_HUGETLBFS=y
CONFIG_HUGETLB_PAGE=y
CONFIG_RAMFS=y
-# CONFIG_RELAYFS_FS is not set
# CONFIG_CONFIGFS_FS is not set
#
PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
#define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
+#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
+ PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
#define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
PPC_FEATURE_BOOKE)
.oprofile_type = PPC_OPROFILE_POWER4,
.platform = "power5+",
},
+ { /* Power6 */
+ .pvr_mask = 0xffff0000,
+ .pvr_value = 0x003e0000,
+ .cpu_name = "POWER6",
+ .cpu_features = CPU_FTRS_POWER6,
+ .cpu_user_features = COMMON_USER_POWER6,
+ .icache_bsize = 128,
+ .dcache_bsize = 128,
+ .num_pmcs = 6,
+ .cpu_setup = __setup_cpu_power4,
+ .oprofile_cpu_type = "ppc64/power6",
+ .oprofile_type = PPC_OPROFILE_POWER4,
+ .platform = "power6",
+ },
{ /* Cell Broadband Engine */
.pvr_mask = 0xffff0000,
.pvr_value = 0x00700000,
(void *)hdr
+ sechdrs[sechdrs[i].sh_link].sh_offset);
}
- if (!me->arch.stubs_section || !me->arch.toc_section) {
- printk("%s: doesn't contain .toc or .stubs.\n", me->name);
+
+ if (!me->arch.stubs_section) {
+ printk("%s: doesn't contain .stubs.\n", me->name);
return -ENOEXEC;
}
+ /* If we don't have a .toc, just use .stubs. We need to set r2
+ to some reasonable value in case the module calls out to
+ other functions via a stub, or if a function pointer escapes
+ the module by some means. */
+ if (!me->arch.toc_section)
+ me->arch.toc_section = me->arch.stubs_section;
+
/* Override the stubs size */
sechdrs[me->arch.stubs_section].sh_size = get_stubs_size(hdr, sechdrs);
return 0;
break;
case R_PPC64_TOC16:
- /* Subtact TOC pointer */
+ /* Subtract TOC pointer */
value -= my_r2(sechdrs, me);
if (value + 0x8000 > 0xffff) {
printk("%s: bad TOC16 relocation (%lu)\n",
break;
case R_PPC64_TOC16_DS:
- /* Subtact TOC pointer */
+ /* Subtract TOC pointer */
value -= my_r2(sechdrs, me);
if ((value & 3) != 0 || value + 0x8000 > 0xffff) {
printk("%s: bad TOC16_DS relocation (%lu)\n",
#ifdef CONFIG_PPC_PSERIES
/*
- * To tell the firmware what our capabilities are, we have to pass
- * it a fake 32-bit ELF header containing a couple of PT_NOTE sections
- * that contain structures that contain the actual values.
+ * There are two methods for telling firmware what our capabilities are.
+ * Newer machines have an "ibm,client-architecture-support" method on the
+ * root node. For older machines, we have to call the "process-elf-header"
+ * method in the /packages/elf-loader node, passing it a fake 32-bit
+ * ELF header containing a couple of PT_NOTE sections that contain
+ * structures that contain various information.
*/
+
+/*
+ * New method - extensible architecture description vector.
+ *
+ * Because the description vector contains a mix of byte and word
+ * values, we declare it as an unsigned char array, and use this
+ * macro to put word values in.
+ */
+#define W(x) ((x) >> 24) & 0xff, ((x) >> 16) & 0xff, \
+ ((x) >> 8) & 0xff, (x) & 0xff
+
+/* Option vector bits - generic bits in byte 1 */
+#define OV_IGNORE 0x80 /* ignore this vector */
+#define OV_CESSATION_POLICY 0x40 /* halt if unsupported option present*/
+
+/* Option vector 1: processor architectures supported */
+#define OV1_PPC_2_00 0x80 /* set if we support PowerPC 2.00 */
+#define OV1_PPC_2_01 0x40 /* set if we support PowerPC 2.01 */
+#define OV1_PPC_2_02 0x20 /* set if we support PowerPC 2.02 */
+#define OV1_PPC_2_03 0x10 /* set if we support PowerPC 2.03 */
+#define OV1_PPC_2_04 0x08 /* set if we support PowerPC 2.04 */
+#define OV1_PPC_2_05 0x04 /* set if we support PowerPC 2.05 */
+
+/* Option vector 2: Open Firmware options supported */
+#define OV2_REAL_MODE 0x20 /* set if we want OF in real mode */
+
+/* Option vector 3: processor options supported */
+#define OV3_FP 0x80 /* floating point */
+#define OV3_VMX 0x40 /* VMX/Altivec */
+
+/* Option vector 5: PAPR/OF options supported */
+#define OV5_LPAR 0x80 /* logical partitioning supported */
+#define OV5_SPLPAR 0x40 /* shared-processor LPAR supported */
+/* ibm,dynamic-reconfiguration-memory property supported */
+#define OV5_DRCONF_MEMORY 0x20
+#define OV5_LARGE_PAGES 0x10 /* large pages supported */
+
+/*
+ * The architecture vector has an array of PVR mask/value pairs,
+ * followed by # option vectors - 1, followed by the option vectors.
+ */
+static unsigned char ibm_architecture_vec[] = {
+ W(0xfffe0000), W(0x003a0000), /* POWER5/POWER5+ */
+ W(0xffff0000), W(0x003e0000), /* POWER6 */
+ W(0xfffffffe), W(0x0f000001), /* all 2.04-compliant and earlier */
+ 5 - 1, /* 5 option vectors */
+
+ /* option vector 1: processor architectures supported */
+ 3 - 1, /* length */
+ 0, /* don't ignore, don't halt */
+ OV1_PPC_2_00 | OV1_PPC_2_01 | OV1_PPC_2_02 | OV1_PPC_2_03 |
+ OV1_PPC_2_04 | OV1_PPC_2_05,
+
+ /* option vector 2: Open Firmware options supported */
+ 34 - 1, /* length */
+ OV2_REAL_MODE,
+ 0, 0,
+ W(0xffffffff), /* real_base */
+ W(0xffffffff), /* real_size */
+ W(0xffffffff), /* virt_base */
+ W(0xffffffff), /* virt_size */
+ W(0xffffffff), /* load_base */
+ W(64), /* 128MB min RMA */
+ W(0xffffffff), /* full client load */
+ 0, /* min RMA percentage of total RAM */
+ 48, /* max log_2(hash table size) */
+
+ /* option vector 3: processor options supported */
+ 3 - 1, /* length */
+ 0, /* don't ignore, don't halt */
+ OV3_FP | OV3_VMX,
+
+ /* option vector 4: IBM PAPR implementation */
+ 2 - 1, /* length */
+ 0, /* don't halt */
+
+ /* option vector 5: PAPR/OF options */
+ 3 - 1, /* length */
+ 0, /* don't ignore, don't halt */
+ OV5_LPAR | OV5_SPLPAR | OV5_LARGE_PAGES,
+};
+
+/* Old method - ELF header with PT_NOTE sections */
static struct fake_elf {
Elf32_Ehdr elfhdr;
Elf32_Phdr phdr[2];
static void __init prom_send_capabilities(void)
{
- ihandle elfloader;
+ ihandle elfloader, root;
+ prom_arg_t ret;
+
+ root = call_prom("open", 1, 1, ADDR("/"));
+ if (root != 0) {
+ /* try calling the ibm,client-architecture-support method */
+ if (call_prom_ret("call-method", 3, 2, &ret,
+ ADDR("ibm,client-architecture-support"),
+ ADDR(ibm_architecture_vec)) == 0) {
+ /* the call exists... */
+ if (ret)
+ prom_printf("WARNING: ibm,client-architecture"
+ "-support call FAILED!\n");
+ call_prom("close", 1, 0, root);
+ return;
+ }
+ call_prom("close", 1, 0, root);
+ }
+ /* no ibm,client-architecture-support call, try the old way */
elfloader = call_prom("open", 1, 1, ADDR("/packages/elf-loader"));
if (elfloader == 0) {
prom_printf("couldn't open /packages/elf-loader\n");
printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
}
+
+int check_legacy_ioport(unsigned long base_port)
+{
+ if (ppc_md.check_legacy_ioport == NULL)
+ return 0;
+ return ppc_md.check_legacy_ioport(base_port);
+}
+EXPORT_SYMBOL(check_legacy_ioport);
printk("[terminate]%04x %s\n", src, msg);
}
-int check_legacy_ioport(unsigned long base_port)
-{
- if (ppc_md.check_legacy_ioport == NULL)
- return 0;
- return ppc_md.check_legacy_ioport(base_port);
-}
-EXPORT_SYMBOL(check_legacy_ioport);
-
void cpu_die(void)
{
if (ppc_md.cpu_die)
SYSCALL(splice)
SYSCALL(tee)
SYSCALL(vmsplice)
+COMPAT_SYS(openat)
+SYSCALL(mkdirat)
+SYSCALL(mknodat)
+SYSCALL(fchownat)
+COMPAT_SYS(futimesat)
+SYSX(sys_newfstatat, sys_fstatat64, sys_fstatat64)
+SYSCALL(unlinkat)
+SYSCALL(renameat)
+SYSCALL(linkat)
+SYSCALL(symlinkat)
+SYSCALL(readlinkat)
+SYSCALL(fchmodat)
+SYSCALL(faccessat)
/*
* please add new calls to arch/powerpc/platforms/cell/spu_callbacks.c
#define NUM_LOW_AREAS (0x100000000UL >> SID_SHIFT)
#define NUM_HIGH_AREAS (PGTABLE_RANGE >> HTLB_AREA_SHIFT)
+#ifdef CONFIG_PPC_64K_PAGES
+#define HUGEPTE_INDEX_SIZE (PMD_SHIFT-HPAGE_SHIFT)
+#else
+#define HUGEPTE_INDEX_SIZE (PUD_SHIFT-HPAGE_SHIFT)
+#endif
+#define PTRS_PER_HUGEPTE (1 << HUGEPTE_INDEX_SIZE)
+#define HUGEPTE_TABLE_SIZE (sizeof(pte_t) << HUGEPTE_INDEX_SIZE)
+
+#define HUGEPD_SHIFT (HPAGE_SHIFT + HUGEPTE_INDEX_SIZE)
+#define HUGEPD_SIZE (1UL << HUGEPD_SHIFT)
+#define HUGEPD_MASK (~(HUGEPD_SIZE-1))
+
+#define huge_pgtable_cache (pgtable_cache[HUGEPTE_CACHE_NUM])
+
+/* Flag to mark huge PD pointers. This means pmd_bad() and pud_bad()
+ * will choke on pointers to hugepte tables, which is handy for
+ * catching screwups early. */
+#define HUGEPD_OK 0x1
+
+typedef struct { unsigned long pd; } hugepd_t;
+
+#define hugepd_none(hpd) ((hpd).pd == 0)
+
+static inline pte_t *hugepd_page(hugepd_t hpd)
+{
+ BUG_ON(!(hpd.pd & HUGEPD_OK));
+ return (pte_t *)(hpd.pd & ~HUGEPD_OK);
+}
+
+static inline pte_t *hugepte_offset(hugepd_t *hpdp, unsigned long addr)
+{
+ unsigned long idx = ((addr >> HPAGE_SHIFT) & (PTRS_PER_HUGEPTE-1));
+ pte_t *dir = hugepd_page(*hpdp);
+
+ return dir + idx;
+}
+
+static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp,
+ unsigned long address)
+{
+ pte_t *new = kmem_cache_alloc(huge_pgtable_cache,
+ GFP_KERNEL|__GFP_REPEAT);
+
+ if (! new)
+ return -ENOMEM;
+
+ spin_lock(&mm->page_table_lock);
+ if (!hugepd_none(*hpdp))
+ kmem_cache_free(huge_pgtable_cache, new);
+ else
+ hpdp->pd = (unsigned long)new | HUGEPD_OK;
+ spin_unlock(&mm->page_table_lock);
+ return 0;
+}
+
/* Modelled after find_linux_pte() */
pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)
{
pgd_t *pg;
pud_t *pu;
- pmd_t *pm;
- pte_t *pt;
BUG_ON(! in_hugepage_area(mm->context, addr));
if (!pgd_none(*pg)) {
pu = pud_offset(pg, addr);
if (!pud_none(*pu)) {
- pm = pmd_offset(pu, addr);
#ifdef CONFIG_PPC_64K_PAGES
- /* Currently, we use the normal PTE offset within full
- * size PTE pages, thus our huge PTEs are scattered in
- * the PTE page and we do waste some. We may change
- * that in the future, but the current mecanism keeps
- * things much simpler
- */
- if (!pmd_none(*pm)) {
- /* Note: pte_offset_* are all equivalent on
- * ppc64 as we don't have HIGHMEM
- */
- pt = pte_offset_kernel(pm, addr);
- return pt;
- }
-#else /* CONFIG_PPC_64K_PAGES */
- /* On 4k pages, we put huge PTEs in the PMD page */
- pt = (pte_t *)pm;
- return pt;
-#endif /* CONFIG_PPC_64K_PAGES */
+ pmd_t *pm;
+ pm = pmd_offset(pu, addr);
+ if (!pmd_none(*pm))
+ return hugepte_offset((hugepd_t *)pm, addr);
+#else
+ return hugepte_offset((hugepd_t *)pu, addr);
+#endif
}
}
{
pgd_t *pg;
pud_t *pu;
- pmd_t *pm;
- pte_t *pt;
+ hugepd_t *hpdp = NULL;
BUG_ON(! in_hugepage_area(mm->context, addr));
pu = pud_alloc(mm, pg, addr);
if (pu) {
+#ifdef CONFIG_PPC_64K_PAGES
+ pmd_t *pm;
pm = pmd_alloc(mm, pu, addr);
- if (pm) {
+ if (pm)
+ hpdp = (hugepd_t *)pm;
+#else
+ hpdp = (hugepd_t *)pu;
+#endif
+ }
+
+ if (! hpdp)
+ return NULL;
+
+ if (hugepd_none(*hpdp) && __hugepte_alloc(mm, hpdp, addr))
+ return NULL;
+
+ return hugepte_offset(hpdp, addr);
+}
+
+static void free_hugepte_range(struct mmu_gather *tlb, hugepd_t *hpdp)
+{
+ pte_t *hugepte = hugepd_page(*hpdp);
+
+ hpdp->pd = 0;
+ tlb->need_flush = 1;
+ pgtable_free_tlb(tlb, pgtable_free_cache(hugepte, HUGEPTE_CACHE_NUM,
+ HUGEPTE_TABLE_SIZE-1));
+}
+
#ifdef CONFIG_PPC_64K_PAGES
- /* See comment in huge_pte_offset. Note that if we ever
- * want to put the page size in the PMD, we would have
- * to open code our own pte_alloc* function in order
- * to populate and set the size atomically
- */
- pt = pte_alloc_map(mm, pm, addr);
-#else /* CONFIG_PPC_64K_PAGES */
- pt = (pte_t *)pm;
-#endif /* CONFIG_PPC_64K_PAGES */
- return pt;
- }
+static void hugetlb_free_pmd_range(struct mmu_gather *tlb, pud_t *pud,
+ unsigned long addr, unsigned long end,
+ unsigned long floor, unsigned long ceiling)
+{
+ pmd_t *pmd;
+ unsigned long next;
+ unsigned long start;
+
+ start = addr;
+ pmd = pmd_offset(pud, addr);
+ do {
+ next = pmd_addr_end(addr, end);
+ if (pmd_none(*pmd))
+ continue;
+ free_hugepte_range(tlb, (hugepd_t *)pmd);
+ } while (pmd++, addr = next, addr != end);
+
+ start &= PUD_MASK;
+ if (start < floor)
+ return;
+ if (ceiling) {
+ ceiling &= PUD_MASK;
+ if (!ceiling)
+ return;
}
+ if (end - 1 > ceiling - 1)
+ return;
- return NULL;
+ pmd = pmd_offset(pud, start);
+ pud_clear(pud);
+ pmd_free_tlb(tlb, pmd);
+}
+#endif
+
+static void hugetlb_free_pud_range(struct mmu_gather *tlb, pgd_t *pgd,
+ unsigned long addr, unsigned long end,
+ unsigned long floor, unsigned long ceiling)
+{
+ pud_t *pud;
+ unsigned long next;
+ unsigned long start;
+
+ start = addr;
+ pud = pud_offset(pgd, addr);
+ do {
+ next = pud_addr_end(addr, end);
+#ifdef CONFIG_PPC_64K_PAGES
+ if (pud_none_or_clear_bad(pud))
+ continue;
+ hugetlb_free_pmd_range(tlb, pud, addr, next, floor, ceiling);
+#else
+ if (pud_none(*pud))
+ continue;
+ free_hugepte_range(tlb, (hugepd_t *)pud);
+#endif
+ } while (pud++, addr = next, addr != end);
+
+ start &= PGDIR_MASK;
+ if (start < floor)
+ return;
+ if (ceiling) {
+ ceiling &= PGDIR_MASK;
+ if (!ceiling)
+ return;
+ }
+ if (end - 1 > ceiling - 1)
+ return;
+
+ pud = pud_offset(pgd, start);
+ pgd_clear(pgd);
+ pud_free_tlb(tlb, pud);
+}
+
+/*
+ * This function frees user-level page tables of a process.
+ *
+ * Must be called with pagetable lock held.
+ */
+void hugetlb_free_pgd_range(struct mmu_gather **tlb,
+ unsigned long addr, unsigned long end,
+ unsigned long floor, unsigned long ceiling)
+{
+ pgd_t *pgd;
+ unsigned long next;
+ unsigned long start;
+
+ /*
+ * Comments below take from the normal free_pgd_range(). They
+ * apply here too. The tests against HUGEPD_MASK below are
+ * essential, because we *don't* test for this at the bottom
+ * level. Without them we'll attempt to free a hugepte table
+ * when we unmap just part of it, even if there are other
+ * active mappings using it.
+ *
+ * The next few lines have given us lots of grief...
+ *
+ * Why are we testing HUGEPD* at this top level? Because
+ * often there will be no work to do at all, and we'd prefer
+ * not to go all the way down to the bottom just to discover
+ * that.
+ *
+ * Why all these "- 1"s? Because 0 represents both the bottom
+ * of the address space and the top of it (using -1 for the
+ * top wouldn't help much: the masks would do the wrong thing).
+ * The rule is that addr 0 and floor 0 refer to the bottom of
+ * the address space, but end 0 and ceiling 0 refer to the top
+ * Comparisons need to use "end - 1" and "ceiling - 1" (though
+ * that end 0 case should be mythical).
+ *
+ * Wherever addr is brought up or ceiling brought down, we
+ * must be careful to reject "the opposite 0" before it
+ * confuses the subsequent tests. But what about where end is
+ * brought down by HUGEPD_SIZE below? no, end can't go down to
+ * 0 there.
+ *
+ * Whereas we round start (addr) and ceiling down, by different
+ * masks at different levels, in order to test whether a table
+ * now has no other vmas using it, so can be freed, we don't
+ * bother to round floor or end up - the tests don't need that.
+ */
+
+ addr &= HUGEPD_MASK;
+ if (addr < floor) {
+ addr += HUGEPD_SIZE;
+ if (!addr)
+ return;
+ }
+ if (ceiling) {
+ ceiling &= HUGEPD_MASK;
+ if (!ceiling)
+ return;
+ }
+ if (end - 1 > ceiling - 1)
+ end -= HUGEPD_SIZE;
+ if (addr > end - 1)
+ return;
+
+ start = addr;
+ pgd = pgd_offset((*tlb)->mm, addr);
+ do {
+ BUG_ON(! in_hugepage_area((*tlb)->mm->context, addr));
+ next = pgd_addr_end(addr, end);
+ if (pgd_none_or_clear_bad(pgd))
+ continue;
+ hugetlb_free_pud_range(*tlb, pgd, addr, next, floor, ceiling);
+ } while (pgd++, addr = next, addr != end);
}
void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
out:
return err;
}
+
+static void zero_ctor(void *addr, kmem_cache_t *cache, unsigned long flags)
+{
+ memset(addr, 0, kmem_cache_size(cache));
+}
+
+static int __init hugetlbpage_init(void)
+{
+ if (!cpu_has_feature(CPU_FTR_16M_PAGE))
+ return -ENODEV;
+
+ huge_pgtable_cache = kmem_cache_create("hugepte_cache",
+ HUGEPTE_TABLE_SIZE,
+ HUGEPTE_TABLE_SIZE,
+ SLAB_HWCACHE_ALIGN |
+ SLAB_MUST_HWCACHE_ALIGN,
+ zero_ctor, NULL);
+ if (! huge_pgtable_cache)
+ panic("hugetlbpage_init(): could not create hugepte cache\n");
+
+ return 0;
+}
+
+module_init(hugetlbpage_init);
};
#endif /* CONFIG_PPC_64K_PAGES */
+#ifdef CONFIG_HUGETLB_PAGE
+/* Hugepages need one extra cache, initialized in hugetlbpage.c. We
+ * can't put into the tables above, because HPAGE_SHIFT is not compile
+ * time constant. */
+kmem_cache_t *pgtable_cache[ARRAY_SIZE(pgtable_cache_size)+1];
+#else
kmem_cache_t *pgtable_cache[ARRAY_SIZE(pgtable_cache_size)];
+#endif
void pgtable_cache_init(void)
{
snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0", spu->number);
ret = request_irq(irq_base + spu->isrc,
- spu_irq_class_0, 0, spu->irq_c0, spu);
+ spu_irq_class_0, SA_INTERRUPT, spu->irq_c0, spu);
if (ret)
goto out;
snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1", spu->number);
ret = request_irq(irq_base + IIC_CLASS_STRIDE + spu->isrc,
- spu_irq_class_1, 0, spu->irq_c1, spu);
+ spu_irq_class_1, SA_INTERRUPT, spu->irq_c1, spu);
if (ret)
goto out1;
snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2", spu->number);
ret = request_irq(irq_base + 2*IIC_CLASS_STRIDE + spu->isrc,
- spu_irq_class_2, 0, spu->irq_c2, spu);
+ spu_irq_class_2, SA_INTERRUPT, spu->irq_c2, spu);
if (ret)
goto out2;
goto out;
ea = spu->dar;
dsisr = spu->dsisr;
if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED)) {
+ u64 flags;
+
access = (_PAGE_PRESENT | _PAGE_USER);
access |= (dsisr & MFC_DSISR_ACCESS_PUT) ? _PAGE_RW : 0UL;
+ local_irq_save(flags);
if (hash_page(ea, access, 0x300) != 0)
error |= CLASS1_ENABLE_STORAGE_FAULT_INTR;
+ local_irq_restore(flags);
}
if (error & CLASS1_ENABLE_STORAGE_FAULT_INTR) {
if ((ret = spu_handle_mm_fault(spu)) != 0)
[__NR_splice] sys_splice,
[__NR_tee] sys_tee,
[__NR_vmsplice] sys_vmsplice,
+ [__NR_openat] sys_openat,
+ [__NR_mkdirat] sys_mkdirat,
+ [__NR_mknodat] sys_mknodat,
+ [__NR_fchownat] sys_fchownat,
+ [__NR_futimesat] sys_futimesat,
+ [__NR_newfstatat] sys_newfstatat,
+ [__NR_unlinkat] sys_unlinkat,
+ [__NR_renameat] sys_renameat,
+ [__NR_linkat] sys_linkat,
+ [__NR_symlinkat] sys_symlinkat,
+ [__NR_readlinkat] sys_readlinkat,
+ [__NR_fchmodat] sys_fchmodat,
+ [__NR_faccessat] sys_faccessat,
};
long spu_sys_callback(struct spu_syscall_block *s)
void __init platform_init(unsigned long r3, unsigned long r4,
unsigned long r5, unsigned long r6, unsigned long r7)
{
- ibm44x_platform_init(r3, r4, r5, r6, r7);
+ ibm440gx_platform_init(r3, r4, r5, r6, r7);
ppc_md.setup_arch = ocotea_setup_arch;
ppc_md.show_cpuinfo = ocotea_show_cpuinfo;
#include <asm/irq.h>
#include <asm/ppc_sys.h>
#include <asm/ppcboot.h>
+#include <linux/fs_uart_pd.h>
#include "pq2ads_pd.h"
static void init_fcc1_ioports(void);
static void init_fcc2_ioports(void);
+static void init_scc1_uart_ioports(void);
+static void init_scc4_uart_ioports(void);
+
+static struct fs_uart_platform_info mpc8272_uart_pdata[] = {
+ [fsid_scc1_uart] = {
+ .init_ioports = init_scc1_uart_ioports,
+ .fs_no = fsid_scc1_uart,
+ .brg = 1,
+ .tx_num_fifo = 4,
+ .tx_buf_size = 32,
+ .rx_num_fifo = 4,
+ .rx_buf_size = 32,
+ },
+ [fsid_scc4_uart] = {
+ .init_ioports = init_scc4_uart_ioports,
+ .fs_no = fsid_scc4_uart,
+ .brg = 4,
+ .tx_num_fifo = 4,
+ .tx_buf_size = 32,
+ .rx_num_fifo = 4,
+ .rx_buf_size = 32,
+ },
+};
static struct fs_mii_bus_info mii_bus_info = {
.method = fsmii_bitbang,
}
}
+static void mpc8272ads_fixup_uart_pdata(struct platform_device *pdev,
+ int idx)
+{
+ bd_t *bd = (bd_t *) __res;
+ struct fs_uart_platform_info *pinfo;
+ int num = ARRAY_SIZE(mpc8272_uart_pdata);
+ int id = fs_uart_id_scc2fsid(idx);
+
+ /* no need to alter anything if console */
+ if ((id <= num) && (!pdev->dev.platform_data)) {
+ pinfo = &mpc8272_uart_pdata[id];
+ pinfo->uart_clk = bd->bi_intfreq;
+ pdev->dev.platform_data = pinfo;
+ }
+}
+
+static void init_scc1_uart_ioports(void)
+{
+ cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
+
+ /* SCC1 is only on port D */
+ setbits32(&immap->im_ioport.iop_ppard,0x00000003);
+ clrbits32(&immap->im_ioport.iop_psord,0x00000001);
+ setbits32(&immap->im_ioport.iop_psord,0x00000002);
+ clrbits32(&immap->im_ioport.iop_pdird,0x00000001);
+ setbits32(&immap->im_ioport.iop_pdird,0x00000002);
+
+ /* Wire BRG1 to SCC1 */
+ clrbits32(&immap->im_cpmux.cmx_scr,0x00ffffff);
+
+ iounmap(immap);
+}
+
+static void init_scc4_uart_ioports(void)
+{
+ cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
+
+ setbits32(&immap->im_ioport.iop_ppard,0x00000600);
+ clrbits32(&immap->im_ioport.iop_psord,0x00000600);
+ clrbits32(&immap->im_ioport.iop_pdird,0x00000200);
+ setbits32(&immap->im_ioport.iop_pdird,0x00000400);
+
+ /* Wire BRG4 to SCC4 */
+ clrbits32(&immap->im_cpmux.cmx_scr,0x000000ff);
+ setbits32(&immap->im_cpmux.cmx_scr,0x0000001b);
+
+ iounmap(immap);
+}
+
static int mpc8272ads_platform_notify(struct device *dev)
{
static const struct platform_notify_dev_map dev_map[] = {
.bus_id = "fsl-cpm-fcc",
.rtn = mpc8272ads_fixup_enet_pdata
},
+ {
+ .bus_id = "fsl-cpm-scc:uart",
+ .rtn = mpc
+ },
{
.bus_id = NULL
}
ppc_sys_device_enable(MPC82xx_CPM_FCC1);
ppc_sys_device_enable(MPC82xx_CPM_FCC2);
+ /* to be ready for console, let's attach pdata here */
+#ifdef CONFIG_SERIAL_CPM_SCC1
+ ppc_sys_device_setfunc(MPC82xx_CPM_SCC1, PPC_SYS_FUNC_UART);
+ ppc_sys_device_enable(MPC82xx_CPM_SCC1);
+
+#endif
+
+#ifdef CONFIG_SERIAL_CPM_SCC4
+ ppc_sys_device_setfunc(MPC82xx_CPM_SCC4, PPC_SYS_FUNC_UART);
+ ppc_sys_device_enable(MPC82xx_CPM_SCC4);
+#endif
+
+
return 0;
}
+/*
+ To prevent confusion, console selection is gross:
+ by 0 assumed SCC1 and by 1 assumed SCC4
+ */
+struct platform_device* early_uart_get_pdev(int index)
+{
+ bd_t *bd = (bd_t *) __res;
+ struct fs_uart_platform_info *pinfo;
+
+ struct platform_device* pdev = NULL;
+ if(index) { /*assume SCC4 here*/
+ pdev = &ppc_sys_platform_devices[MPC82xx_CPM_SCC4];
+ pinfo = &mpc8272<F12>_uart_pdata[1];
+ } else { /*over SCC1*/
+ pdev = &ppc_sys_platform_devices[MPC82xx_CPM_SCC1];
+ pinfo = &mpc8272_uart_pdata[0];
+ }
+
+ pinfo->uart_clk = bd->bi_intfreq;
+ pdev->dev.platform_data = pinfo;
+ ppc_sys_fixup_mem_resource(pdev, IMAP_ADDR);
+ return NULL;
+}
+
arch_initcall(mpc8272ads_init);
#include <linux/device.h>
#include <linux/fs_enet_pd.h>
+#include <linux/fs_uart_pd.h>
#include <linux/mii.h>
#include <asm/delay.h>
extern unsigned char __res[];
+static void setup_fec1_ioports(void);
+static void setup_scc1_ioports(void);
+static void setup_smc1_ioports(void);
+static void setup_smc2_ioports(void);
+
static struct fs_mii_bus_info fec_mii_bus_info = {
.method = fsmii_fec,
.id = 0,
.phy_irq = -1,
.bus_info = &scc_mii_bus_info,
+
+};
+
+static struct fs_uart_platform_info mpc866_uart_pdata[] = {
+ [fsid_smc1_uart] = {
+ .brg = 1,
+ .fs_no = fsid_smc1_uart,
+ .init_ioports = setup_smc1_ioports,
+ .tx_num_fifo = 4,
+ .tx_buf_size = 32,
+ .rx_num_fifo = 4,
+ .rx_buf_size = 32,
+ },
+ [fsid_smc2_uart] = {
+ .brg = 2,
+ .fs_no = fsid_smc2_uart,
+ .init_ioports = setup_smc2_ioports,
+ .tx_num_fifo = 4,
+ .tx_buf_size = 32,
+ .rx_num_fifo = 4,
+ .rx_buf_size = 32,
+ },
};
void __init board_init(void)
printk(KERN_CRIT "Could not remap BCSR1\n");
return;
}
+
#ifdef CONFIG_SERIAL_CPM_SMC1
cp->cp_simode &= ~(0xe0000000 >> 17); /* brg1 */
clrbits32(bcsr_io,(0x80000000 >> 7));
+ cp->cp_smc[0].smc_smcm |= (SMCM_RX | SMCM_TX);
+ cp->cp_smc[0].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
#else
setbits32(bcsr_io,(0x80000000 >> 7));
cp->cp_simode &= ~(0xe0000000 >> 1);
cp->cp_simode |= (0x20000000 >> 1); /* brg2 */
clrbits32(bcsr_io,(0x80000000 >> 13));
+ cp->cp_smc[1].smc_smcm |= (SMCM_RX | SMCM_TX);
+ cp->cp_smc[1].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
#else
clrbits32(bcsr_io,(0x80000000 >> 13));
cp->cp_pbpar &= ~(0x00000c00);
mpc866ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1);
}
+static void setup_smc1_ioports(void)
+{
+ immap_t *immap = (immap_t *) IMAP_ADDR;
+ unsigned *bcsr_io;
+ unsigned int iobits = 0x000000c0;
+
+ bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
+
+ if (bcsr_io == NULL) {
+ printk(KERN_CRIT "Could not remap BCSR1\n");
+ return;
+ }
+
+ clrbits32(bcsr_io,BCSR1_RS232EN_1);
+ iounmap(bcsr_io);
+
+ setbits32(&immap->im_cpm.cp_pbpar, iobits);
+ clrbits32(&immap->im_cpm.cp_pbdir, iobits);
+ clrbits16(&immap->im_cpm.cp_pbodr, iobits);
+
+}
+
+static void setup_smc2_ioports(void)
+{
+ immap_t *immap = (immap_t *) IMAP_ADDR;
+ unsigned *bcsr_io;
+ unsigned int iobits = 0x00000c00;
+
+ bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
+
+ if (bcsr_io == NULL) {
+ printk(KERN_CRIT "Could not remap BCSR1\n");
+ return;
+ }
+
+ clrbits32(bcsr_io,BCSR1_RS232EN_2);
+
+ iounmap(bcsr_io);
+
+#ifndef CONFIG_SERIAL_CPM_ALT_SMC2
+ setbits32(&immap->im_cpm.cp_pbpar, iobits);
+ clrbits32(&immap->im_cpm.cp_pbdir, iobits);
+ clrbits16(&immap->im_cpm.cp_pbodr, iobits);
+#else
+ setbits16(&immap->im_ioport.iop_papar, iobits);
+ clrbits16(&immap->im_ioport.iop_padir, iobits);
+ clrbits16(&immap->im_ioport.iop_paodr, iobits);
+#endif
+
+}
+
+static void __init mpc866ads_fixup_uart_pdata(struct platform_device *pdev,
+ int idx)
+{
+ bd_t *bd = (bd_t *) __res;
+ struct fs_uart_platform_info *pinfo;
+ int num = ARRAY_SIZE(mpc866_uart_pdata);
+
+ int id = fs_uart_id_smc2fsid(idx);
+
+ /* no need to alter anything if console */
+ if ((id <= num) && (!pdev->dev.platform_data)) {
+ pinfo = &mpc866_uart_pdata[id];
+ pinfo->uart_clk = bd->bi_intfreq;
+ pdev->dev.platform_data = pinfo;
+ }
+}
+
static int mpc866ads_platform_notify(struct device *dev)
{
static const struct platform_notify_dev_map dev_map[] = {
.bus_id = "fsl-cpm-scc",
.rtn = mpc866ads_fixup_scc_enet_pdata,
},
+ {
+ .bus_id = "fsl-cpm-smc:uart",
+ .rtn = mpc866ads_fixup_uart_pdata
+ },
{
.bus_id = NULL
}
#endif
ppc_sys_device_enable(MPC8xx_CPM_FEC1);
+/* Since either of the uarts could be used as console, they need to ready */
+#ifdef CONFIG_SERIAL_CPM_SMC1
+ ppc_sys_device_enable(MPC8xx_CPM_SMC1);
+ ppc_sys_device_setfunc(MPC8xx_CPM_SMC1, PPC_SYS_FUNC_UART);
+#endif
+
+#ifdef CONFIG_SERIAL_CPM_SMCer
+ ppc_sys_device_enable(MPC8xx_CPM_SMC2);
+ ppc_sys_device_setfunc(MPC8xx_CPM_SMC2, PPC_SYS_FUNC_UART);
+#endif
+
return 0;
}
+/*
+ To prevent confusion, console selection is gross:
+ by 0 assumed SMC1 and by 1 assumed SMC2
+ */
+struct platform_device* early_uart_get_pdev(int index)
+{
+ bd_t *bd = (bd_t *) __res;
+ struct fs_uart_platform_info *pinfo;
+
+ struct platform_device* pdev = NULL;
+ if(index) { /*assume SMC2 here*/
+ pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC2];
+ pinfo = &mpc866_uart_pdata[1];
+ } else { /*over SMC1*/
+ pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC1];
+ pinfo = &mpc866_uart_pdata[0];
+ }
+
+ pinfo->uart_clk = bd->bi_intfreq;
+ pdev->dev.platform_data = pinfo;
+ ppc_sys_fixup_mem_resource(pdev, IMAP_ADDR);
+ return NULL;
+}
+
arch_initcall(mpc866ads_init);
#include <linux/device.h>
#include <linux/fs_enet_pd.h>
+#include <linux/fs_uart_pd.h>
#include <linux/mii.h>
#include <asm/delay.h>
#include <asm/ppc_sys.h>
extern unsigned char __res[];
+static void setup_smc1_ioports(void);
+static void setup_smc2_ioports(void);
static void __init mpc885ads_scc_phy_init(char);
+static struct fs_uart_platform_info mpc885_uart_pdata[] = {
+ [fsid_smc1_uart] = {
+ .brg = 1,
+ .fs_no = fsid_smc1_uart,
+ .init_ioports = setup_smc1_ioports,
+ .tx_num_fifo = 4,
+ .tx_buf_size = 32,
+ .rx_num_fifo = 4,
+ .rx_buf_size = 32,
+ },
+ [fsid_smc2_uart] = {
+ .brg = 2,
+ .fs_no = fsid_smc2_uart,
+ .init_ioports = setup_smc2_ioports,
+ .tx_num_fifo = 4,
+ .tx_buf_size = 32,
+ .rx_num_fifo = 4,
+ .rx_buf_size = 32,
+ },
+};
+
static struct fs_mii_bus_info fec_mii_bus_info = {
.method = fsmii_fec,
.id = 0,
#ifdef CONFIG_SERIAL_CPM_SMC1
cp->cp_simode &= ~(0xe0000000 >> 17); /* brg1 */
clrbits32(bcsr_io, BCSR1_RS232EN_1);
+ cp->cp_smc[0].smc_smcm |= (SMCM_RX | SMCM_TX);
+ cp->cp_smc[0].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
#else
setbits32(bcsr_io,BCSR1_RS232EN_1);
cp->cp_smc[0].smc_smcmr = 0;
cp->cp_simode &= ~(0xe0000000 >> 1);
cp->cp_simode |= (0x20000000 >> 1); /* brg2 */
clrbits32(bcsr_io,BCSR1_RS232EN_2);
+ cp->cp_smc[1].smc_smcm |= (SMCM_RX | SMCM_TX);
+ cp->cp_smc[1].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
#else
setbits32(bcsr_io,BCSR1_RS232EN_2);
cp->cp_smc[1].smc_smcmr = 0;
out_be32(&fecp->fec_mii_speed, 0);
}
+static void setup_smc1_ioports(void)
+{
+ immap_t *immap = (immap_t *) IMAP_ADDR;
+ unsigned *bcsr_io;
+ unsigned int iobits = 0x000000c0;
+
+ bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
+
+ if (bcsr_io == NULL) {
+ printk(KERN_CRIT "Could not remap BCSR1\n");
+ return;
+ }
+ clrbits32(bcsr_io,BCSR1_RS232EN_1);
+ iounmap(bcsr_io);
+
+ setbits32(&immap->im_cpm.cp_pbpar, iobits);
+ clrbits32(&immap->im_cpm.cp_pbdir, iobits);
+ clrbits16(&immap->im_cpm.cp_pbodr, iobits);
+}
+
+static void setup_smc2_ioports(void)
+{
+ immap_t *immap = (immap_t *) IMAP_ADDR;
+ unsigned *bcsr_io;
+ unsigned int iobits = 0x00000c00;
+
+ bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
+
+ if (bcsr_io == NULL) {
+ printk(KERN_CRIT "Could not remap BCSR1\n");
+ return;
+ }
+ clrbits32(bcsr_io,BCSR1_RS232EN_2);
+ iounmap(bcsr_io);
+
+#ifndef CONFIG_SERIAL_CPM_ALT_SMC2
+ setbits32(&immap->im_cpm.cp_pbpar, iobits);
+ clrbits32(&immap->im_cpm.cp_pbdir, iobits);
+ clrbits16(&immap->im_cpm.cp_pbodr, iobits);
+#else
+ setbits16(&immap->im_ioport.iop_papar, iobits);
+ clrbits16(&immap->im_ioport.iop_padir, iobits);
+ clrbits16(&immap->im_ioport.iop_paodr, iobits);
+#endif
+}
+
+static void __init mpc885ads_fixup_uart_pdata(struct platform_device *pdev,
+ int idx)
+{
+ bd_t *bd = (bd_t *) __res;
+ struct fs_uart_platform_info *pinfo;
+ int num = ARRAY_SIZE(mpc885_uart_pdata);
+
+ int id = fs_uart_id_smc2fsid(idx);
+
+ /* no need to alter anything if console */
+ if ((id <= num) && (!pdev->dev.platform_data)) {
+ pinfo = &mpc885_uart_pdata[id];
+ pinfo->uart_clk = bd->bi_intfreq;
+ pdev->dev.platform_data = pinfo;
+ }
+}
+
+
static int mpc885ads_platform_notify(struct device *dev)
{
.bus_id = "fsl-cpm-scc",
.rtn = mpc885ads_fixup_scc_enet_pdata,
},
+ {
+ .bus_id = "fsl-cpm-smc:uart",
+ .rtn = mpc885ads_fixup_uart_pdata
+ },
{
.bus_id = NULL
}
platform_notify_map(dev_map,dev);
+ return 0;
}
int __init mpc885ads_init(void)
ppc_sys_device_enable(MPC8xx_CPM_FEC2);
#endif
+#ifdef CONFIG_SERIAL_CPM_SMC1
+ ppc_sys_device_enable(MPC8xx_CPM_SMC1);
+ ppc_sys_device_setfunc(MPC8xx_CPM_SMC1, PPC_SYS_FUNC_UART);
+#endif
+
+#ifdef CONFIG_SERIAL_CPM_SMC2
+ ppc_sys_device_enable(MPC8xx_CPM_SMC2);
+ ppc_sys_device_setfunc(MPC8xx_CPM_SMC2, PPC_SYS_FUNC_UART);
+#endif
return 0;
}
arch_initcall(mpc885ads_init);
+
+/*
+ To prevent confusion, console selection is gross:
+ by 0 assumed SMC1 and by 1 assumed SMC2
+ */
+struct platform_device* early_uart_get_pdev(int index)
+{
+ bd_t *bd = (bd_t *) __res;
+ struct fs_uart_platform_info *pinfo;
+
+ struct platform_device* pdev = NULL;
+ if(index) { /*assume SMC2 here*/
+ pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC2];
+ pinfo = &mpc885_uart_pdata[1];
+ } else { /*over SMC1*/
+ pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC1];
+ pinfo = &mpc885_uart_pdata[0];
+ }
+
+ pinfo->uart_clk = bd->bi_intfreq;
+ pdev->dev.platform_data = pinfo;
+ ppc_sys_fixup_mem_resource(pdev, IMAP_ADDR);
+ return NULL;
+}
+
#include <linux/init.h>
+#include <asm/io.h>
#include <asm/mpc8260.h>
+#include <asm/cpm2.h>
+#include <asm/immap_cpm2.h>
void __init
m82xx_board_setup(void)
{
+ cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
+ u32 *bcsr = ioremap(BCSR_ADDR+4, sizeof(u32));
+
/* Enable the 2nd UART port */
- *(volatile uint *)(BCSR_ADDR + 4) &= ~BCSR1_RS232_EN2;
+ clrbits32(bcsr, BCSR1_RS232_EN2);
+
+#ifdef CONFIG_SERIAL_CPM_SCC1
+ clrbits32((u32*)&immap->im_scc[0].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
+ clrbits32((u32*)&immap->im_scc[0].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+#endif
+
+#ifdef CONFIG_SERIAL_CPM_SCC2
+ clrbits32((u32*)&immap->im_scc[1].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
+ clrbits32((u32*)&immap->im_scc[1].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+#endif
+
+#ifdef CONFIG_SERIAL_CPM_SCC3
+ clrbits32((u32*)&immap->im_scc[2].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
+ clrbits32((u32*)&immap->im_scc[2].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+#endif
+
+#ifdef CONFIG_SERIAL_CPM_SCC4
+ clrbits32((u32*)&immap->im_scc[3].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
+ clrbits32((u32*)&immap->im_scc[3].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+#endif
+
+ iounmap(bcsr);
+ iounmap(immap);
}
* PPC440GX system library
*
* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
- * Copyright (c) 2003, 2004 Zultys Technologies
+ * Copyright (c) 2003 - 2006 Zultys Technologies
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
return 0;
}
+void __init ibm440gx_platform_init(unsigned long r3, unsigned long r4,
+ unsigned long r5, unsigned long r6,
+ unsigned long r7)
+{
+ /* Erratum 440_43 workaround, disable L1 cache parity checking */
+ if (!strcmp(cur_cpu_spec->cpu_name, "440GX Rev. C") ||
+ !strcmp(cur_cpu_spec->cpu_name, "440GX Rev. F"))
+ mtspr(SPRN_CCR1, mfspr(SPRN_CCR1) | CCR1_DPC);
+
+ ibm44x_platform_init(r3, r4, r5, r6, r7);
+}
void ibm440gx_get_clocks(struct ibm44x_clocks*, unsigned int sys_clk,
unsigned int ser_clk) __init;
+/* common 440GX platform init */
+void ibm440gx_platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7) __init;
+
/* Enable L2 cache */
void ibm440gx_l2c_enable(void) __init;
[MPC8xx_CPM_SMC1] = {
.name = "fsl-cpm-smc",
.id = 1,
- .num_resources = 2,
+ .num_resources = 3,
.resource = (struct resource[]) {
{
.name = "regs",
- .start = 0xa82,
- .end = 0xa91,
+ .start = 0xa80,
+ .end = 0xa8f,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "pram",
+ .start = 0x3e80,
+ .end = 0x3ebf,
.flags = IORESOURCE_MEM,
},
{
[MPC8xx_CPM_SMC2] = {
.name = "fsl-cpm-smc",
.id = 2,
- .num_resources = 2,
+ .num_resources = 3,
.resource = (struct resource[]) {
{
.name = "regs",
- .start = 0xa92,
- .end = 0xaa1,
+ .start = 0xa90,
+ .end = 0xa9f,
.flags = IORESOURCE_MEM,
},
+ {
+ .name = "pram",
+ .start = 0x3f80,
+ .end = 0x3fbf,
+ .flags = IORESOURCE_MEM,
+
+ },
{
.name = "interrupt",
.start = MPC8xx_INT_SMC2,
int i;
for (i = 0; i < pdev->num_resources; i++) {
struct resource *r = &pdev->resource[i];
- if ((r->flags & IORESOURCE_MEM) == IORESOURCE_MEM) {
+ if (((r->flags & IORESOURCE_MEM) == IORESOURCE_MEM) &&
+ ((r->flags & PPC_SYS_IORESOURCE_FIXUPPED) != PPC_SYS_IORESOURCE_FIXUPPED)) {
r->start += paddr;
r->end += paddr;
+ r->flags |= PPC_SYS_IORESOURCE_FIXUPPED;
}
}
}
.ppc_sys_name = "8248",
.mask = 0x0000ff00,
.value = 0x00000c00,
- .num_devices = 11,
+ .num_devices = 12,
.device_list = (enum ppc_sys_devices[])
{
MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
- MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
- MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
- MPC82xx_CPM_USB, MPC82xx_SEC1,
+ MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4,
+ MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
+ MPC82xx_CPM_I2C, MPC82xx_CPM_USB, MPC82xx_SEC1,
},
},
{
}
use_virtual_dma = can_use_virtual_dma & 1;
-#if defined(CONFIG_PPC64)
+#if defined(CONFIG_PPC_MERGE)
if (check_legacy_ioport(FDC1)) {
del_timer(&fd_timeout);
err = -ENODEV;
* On some platforms touching the i8042 data register region can do really
* bad things. Because of this the region is always reserved on such boxes.
*/
-#if !defined(__sh__) && !defined(__alpha__) && !defined(__mips__) && !defined(CONFIG_PPC64)
+#if !defined(__sh__) && !defined(__alpha__) && !defined(__mips__) && !defined(CONFIG_PPC_MERGE)
if (!request_region(I8042_DATA_REG, 16, "i8042"))
return -EBUSY;
#endif
i8042_reset = 1;
-#if defined(CONFIG_PPC64)
+#if defined(CONFIG_PPC_MERGE)
if (check_legacy_ioport(I8042_DATA_REG))
return -EBUSY;
if (!request_region(I8042_DATA_REG, 16, "i8042"))
config SCSI_ADVANSYS
tristate "AdvanSys SCSI support"
- depends on (ISA || EISA || PCI) && SCSI && BROKEN
+ depends on SCSI
+ depends on ISA || EISA || PCI
+ depends on BROKEN || X86_32
help
This is a driver for all SCSI host adapters manufactured by
AdvanSys. It is documented in the kernel source in
#define ADV_VADDR_TO_U32 virt_to_bus
#define ADV_U32_TO_VADDR bus_to_virt
-#define AdvPortAddr ulong /* Virtual memory address size */
+#define AdvPortAddr void __iomem * /* Virtual memory address size */
/*
* Define Adv Library required memory access macros.
#define CPM_UART_H
#include <linux/config.h>
+#include <linux/platform_device.h>
+#include <linux/fs_uart_pd.h>
#if defined(CONFIG_CPM2)
#include "cpm_uart_cpm2.h"
#define FLAG_SMC 0x00000002
#define FLAG_CONSOLE 0x00000001
-#define UART_SMC1 0
-#define UART_SMC2 1
-#define UART_SCC1 2
-#define UART_SCC2 3
-#define UART_SCC3 4
-#define UART_SCC4 5
+#define UART_SMC1 fsid_smc1_uart
+#define UART_SMC2 fsid_smc2_uart
+#define UART_SCC1 fsid_scc1_uart
+#define UART_SCC2 fsid_scc2_uart
+#define UART_SCC3 fsid_scc3_uart
+#define UART_SCC4 fsid_scc4_uart
-#define UART_NR 6
+#define UART_NR fs_uart_nr
#define RX_NUM_FIFO 4
#define RX_BUF_SIZE 32
uint dp_addr;
void *mem_addr;
dma_addr_t dma_addr;
+ u32 mem_size;
/* helpers */
int baud;
int bits;
void scc3_lineif(struct uart_cpm_port *pinfo);
void scc4_lineif(struct uart_cpm_port *pinfo);
+/*
+ virtual to phys transtalion
+*/
+static inline unsigned long cpu2cpm_addr(void* addr, struct uart_cpm_port *pinfo)
+{
+ int offset;
+ u32 val = (u32)addr;
+ /* sane check */
+ if ((val >= (u32)pinfo->mem_addr) &&
+ (val<((u32)pinfo->mem_addr + pinfo->mem_size))) {
+ offset = val - (u32)pinfo->mem_addr;
+ return pinfo->dma_addr+offset;
+ }
+ printk("%s(): address %x to translate out of range!\n", __FUNCTION__, val);
+ return 0;
+}
+
+static inline void *cpm2cpu_addr(unsigned long addr, struct uart_cpm_port *pinfo)
+{
+ int offset;
+ u32 val = addr;
+ /* sane check */
+ if ((val >= pinfo->dma_addr) &&
+ (val<(pinfo->dma_addr + pinfo->mem_size))) {
+ offset = val - (u32)pinfo->dma_addr;
+ return (void*)(pinfo->mem_addr+offset);
+ }
+ printk("%s(): address %x to translate out of range!\n", __FUNCTION__, val);
+ return 0;
+}
+
+
#endif /* CPM_UART_H */
#include <linux/device.h>
#include <linux/bootmem.h>
#include <linux/dma-mapping.h>
+#include <linux/fs_uart_pd.h>
#include <asm/io.h>
#include <asm/irq.h>
/* Track which ports are configured as uarts */
int cpm_uart_port_map[UART_NR];
/* How many ports did we config as uarts */
-int cpm_uart_nr;
+int cpm_uart_nr = 0;
/**************************************************************/
/**************************************************************/
-static inline unsigned long cpu2cpm_addr(void *addr)
+
+/* Place-holder for board-specific stuff */
+struct platform_device* __attribute__ ((weak)) __init
+early_uart_get_pdev(int index)
{
- if ((unsigned long)addr >= CPM_ADDR)
- return (unsigned long)addr;
- return virt_to_bus(addr);
+ return NULL;
}
-static inline void *cpm2cpu_addr(unsigned long addr)
+
+void cpm_uart_count(void)
{
- if (addr >= CPM_ADDR)
- return (void *)addr;
- return bus_to_virt(addr);
+ cpm_uart_nr = 0;
+#ifdef CONFIG_SERIAL_CPM_SMC1
+ cpm_uart_port_map[cpm_uart_nr++] = UART_SMC1;
+#endif
+#ifdef CONFIG_SERIAL_CPM_SMC2
+ cpm_uart_port_map[cpm_uart_nr++] = UART_SMC2;
+#endif
+#ifdef CONFIG_SERIAL_CPM_SCC1
+ cpm_uart_port_map[cpm_uart_nr++] = UART_SCC1;
+#endif
+#ifdef CONFIG_SERIAL_CPM_SCC2
+ cpm_uart_port_map[cpm_uart_nr++] = UART_SCC2;
+#endif
+#ifdef CONFIG_SERIAL_CPM_SCC3
+ cpm_uart_port_map[cpm_uart_nr++] = UART_SCC3;
+#endif
+#ifdef CONFIG_SERIAL_CPM_SCC4
+ cpm_uart_port_map[cpm_uart_nr++] = UART_SCC4;
+#endif
}
/*
}
/* get pointer */
- cp = cpm2cpu_addr(bdp->cbd_bufaddr);
+ cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
/* loop through the buffer */
while (i-- > 0) {
/* Pick next descriptor and fill from buffer */
bdp = pinfo->tx_cur;
- p = cpm2cpu_addr(bdp->cbd_bufaddr);
+ p = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
*p++ = port->x_char;
bdp->cbd_datlen = 1;
while (!(bdp->cbd_sc & BD_SC_READY) && (xmit->tail != xmit->head)) {
count = 0;
- p = cpm2cpu_addr(bdp->cbd_bufaddr);
+ p = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
while (count < pinfo->tx_fifosize) {
*p++ = xmit->buf[xmit->tail];
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
mem_addr = pinfo->mem_addr;
bdp = pinfo->rx_cur = pinfo->rx_bd_base;
for (i = 0; i < (pinfo->rx_nrfifos - 1); i++, bdp++) {
- bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr);
+ bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo);
bdp->cbd_sc = BD_SC_EMPTY | BD_SC_INTRPT;
mem_addr += pinfo->rx_fifosize;
}
- bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr);
+ bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo);
bdp->cbd_sc = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT;
/* Set the physical address of the host memory
mem_addr = pinfo->mem_addr + L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize);
bdp = pinfo->tx_cur = pinfo->tx_bd_base;
for (i = 0; i < (pinfo->tx_nrfifos - 1); i++, bdp++) {
- bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr);
+ bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo);
bdp->cbd_sc = BD_SC_INTRPT;
mem_addr += pinfo->tx_fifosize;
}
- bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr);
+ bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo);
bdp->cbd_sc = BD_SC_WRAP | BD_SC_INTRPT;
}
if (pinfo->flags & FLAG_CONSOLE)
return 0;
- /*
- * Setup any port IO, connect any baud rate generators,
- * etc. This is expected to be handled by board
- * dependant code
- */
- if (pinfo->set_lineif)
- pinfo->set_lineif(pinfo);
-
if (IS_SMC(pinfo)) {
pinfo->smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
pinfo->smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
},
};
+int cpm_uart_drv_get_platform_data(struct platform_device *pdev, int is_con)
+{
+ struct resource *r;
+ struct fs_uart_platform_info *pdata = pdev->dev.platform_data;
+ int idx = pdata->fs_no; /* It is UART_SMCx or UART_SCCx index */
+ struct uart_cpm_port *pinfo;
+ int line;
+ u32 mem, pram;
+
+ for (line=0; line<UART_NR && cpm_uart_port_map[line]!=pdata->fs_no; line++);
+
+ pinfo = (struct uart_cpm_port *) &cpm_uart_ports[idx];
+
+ pinfo->brg = pdata->brg;
+
+ if (!is_con) {
+ pinfo->port.line = line;
+ pinfo->port.flags = UPF_BOOT_AUTOCONF;
+ }
+
+ if (!(r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs")))
+ return -EINVAL;
+ mem = r->start;
+
+ if (!(r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pram")))
+ return -EINVAL;
+ pram = r->start;
+
+ if(idx > fsid_smc2_uart) {
+ pinfo->sccp = (scc_t *)mem;
+ pinfo->sccup = (scc_uart_t *)pram;
+ } else {
+ pinfo->smcp = (smc_t *)mem;
+ pinfo->smcup = (smc_uart_t *)pram;
+ }
+ pinfo->tx_nrfifos = pdata->tx_num_fifo;
+ pinfo->tx_fifosize = pdata->tx_buf_size;
+
+ pinfo->rx_nrfifos = pdata->rx_num_fifo;
+ pinfo->rx_fifosize = pdata->rx_buf_size;
+
+ pinfo->port.uartclk = pdata->uart_clk;
+ pinfo->port.mapbase = (unsigned long)mem;
+ pinfo->port.irq = platform_get_irq(pdev, 0);
+
+ return 0;
+}
+
#ifdef CONFIG_SERIAL_CPM_CONSOLE
/*
* Print a string to the serial port trying not to disturb
* If the buffer address is in the CPM DPRAM, don't
* convert it.
*/
- cp = cpm2cpu_addr(bdp->cbd_bufaddr);
+ cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
*cp = *s;
while ((bdp->cbd_sc & BD_SC_READY) != 0)
;
- cp = cpm2cpu_addr(bdp->cbd_bufaddr);
+ cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
*cp = 13;
bdp->cbd_datlen = 1;
pinfo->tx_cur = (volatile cbd_t *) bdp;
}
-/*
- * Setup console. Be careful is called early !
- */
+
static int __init cpm_uart_console_setup(struct console *co, char *options)
{
struct uart_port *port;
int flow = 'n';
int ret;
+ struct fs_uart_platform_info *pdata;
+ struct platform_device* pdev = early_uart_get_pdev(co->index);
+
port =
(struct uart_port *)&cpm_uart_ports[cpm_uart_port_map[co->index]];
pinfo = (struct uart_cpm_port *)port;
+ if (!pdev) {
+ pr_info("cpm_uart: console: compat mode\n");
+ /* compatibility - will be cleaned up */
+ cpm_uart_init_portdesc();
+
+ if (pinfo->set_lineif)
+ pinfo->set_lineif(pinfo);
+ } else {
+ pdata = pdev->dev.platform_data;
+ if (pdata)
+ if (pdata->init_ioports)
+ pdata->init_ioports();
+
+ cpm_uart_drv_get_platform_data(pdev, 1);
+ }
pinfo->flags |= FLAG_CONSOLE;
baud = 9600;
}
- /*
- * Setup any port IO, connect any baud rate generators,
- * etc. This is expected to be handled by board
- * dependant code
- */
- if (pinfo->set_lineif)
- pinfo->set_lineif(pinfo);
-
if (IS_SMC(pinfo)) {
pinfo->smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
pinfo->smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
int __init cpm_uart_console_init(void)
{
- int ret = cpm_uart_init_portdesc();
-
- if (!ret)
- register_console(&cpm_scc_uart_console);
- return ret;
+ register_console(&cpm_scc_uart_console);
+ return 0;
}
console_initcall(cpm_uart_console_init);
.minor = SERIAL_CPM_MINOR,
.cons = CPM_UART_CONSOLE,
};
-
-static int __init cpm_uart_init(void)
+static int cpm_uart_drv_probe(struct device *dev)
{
- int ret, i;
-
- printk(KERN_INFO "Serial: CPM driver $Revision: 0.01 $\n");
+ struct platform_device *pdev = to_platform_device(dev);
+ struct fs_uart_platform_info *pdata;
+ int ret = -ENODEV;
-#ifndef CONFIG_SERIAL_CPM_CONSOLE
- ret = cpm_uart_init_portdesc();
- if (ret)
+ if(!pdev) {
+ printk(KERN_ERR"CPM UART: platform data missing!\n");
return ret;
-#endif
+ }
- cpm_reg.nr = cpm_uart_nr;
- ret = uart_register_driver(&cpm_reg);
+ pdata = pdev->dev.platform_data;
+ pr_debug("cpm_uart_drv_probe: Adding CPM UART %d\n",
+ cpm_uart_port_map[pdata->fs_no]);
- if (ret)
+ if ((ret = cpm_uart_drv_get_platform_data(pdev, 0)))
return ret;
- for (i = 0; i < cpm_uart_nr; i++) {
- int con = cpm_uart_port_map[i];
- cpm_uart_ports[con].port.line = i;
- cpm_uart_ports[con].port.flags = UPF_BOOT_AUTOCONF;
- uart_add_one_port(&cpm_reg, &cpm_uart_ports[con].port);
- }
+ if (pdata->init_ioports)
+ pdata->init_ioports();
- return ret;
+ ret = uart_add_one_port(&cpm_reg, &cpm_uart_ports[pdata->fs_no].port);
+
+ return ret;
}
-static void __exit cpm_uart_exit(void)
+static int cpm_uart_drv_remove(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct fs_uart_platform_info *pdata = pdev->dev.platform_data;
+
+ pr_debug("cpm_uart_drv_remove: Removing CPM UART %d\n",
+ cpm_uart_port_map[pdata->fs_no]);
+
+ uart_remove_one_port(&cpm_reg, &cpm_uart_ports[pdata->fs_no].port);
+ return 0;
+}
+
+static struct device_driver cpm_smc_uart_driver = {
+ .name = "fsl-cpm-smc:uart",
+ .bus = &platform_bus_type,
+ .probe = cpm_uart_drv_probe,
+ .remove = cpm_uart_drv_remove,
+};
+
+static struct device_driver cpm_scc_uart_driver = {
+ .name = "fsl-cpm-scc:uart",
+ .bus = &platform_bus_type,
+ .probe = cpm_uart_drv_probe,
+ .remove = cpm_uart_drv_remove,
+};
+
+/*
+ This is supposed to match uart devices on platform bus,
+ */
+static int match_is_uart (struct device* dev, void* data)
{
+ struct platform_device* pdev = container_of(dev, struct platform_device, dev);
+ int ret = 0;
+ /* this was setfunc as uart */
+ if(strstr(pdev->name,":uart")) {
+ ret = 1;
+ }
+ return ret;
+}
+
+
+static int cpm_uart_init(void) {
+
+ int ret;
int i;
+ struct device *dev;
+ printk(KERN_INFO "Serial: CPM driver $Revision: 0.02 $\n");
+
+ /* lookup the bus for uart devices */
+ dev = bus_find_device(&platform_bus_type, NULL, 0, match_is_uart);
+
+ /* There are devices on the bus - all should be OK */
+ if (dev) {
+ cpm_uart_count();
+ cpm_reg.nr = cpm_uart_nr;
+
+ if (!(ret = uart_register_driver(&cpm_reg))) {
+ if ((ret = driver_register(&cpm_smc_uart_driver))) {
+ uart_unregister_driver(&cpm_reg);
+ return ret;
+ }
+ if ((ret = driver_register(&cpm_scc_uart_driver))) {
+ driver_unregister(&cpm_scc_uart_driver);
+ uart_unregister_driver(&cpm_reg);
+ }
+ }
+ } else {
+ /* No capable platform devices found - falling back to legacy mode */
+ pr_info("cpm_uart: WARNING: no UART devices found on platform bus!\n");
+ pr_info(
+ "cpm_uart: the driver will guess configuration, but this mode is no longer supported.\n");
+#ifndef CONFIG_SERIAL_CPM_CONSOLE
+ ret = cpm_uart_init_portdesc();
+ if (ret)
+ return ret;
+#endif
+
+ cpm_reg.nr = cpm_uart_nr;
+ ret = uart_register_driver(&cpm_reg);
+
+ if (ret)
+ return ret;
+
+ for (i = 0; i < cpm_uart_nr; i++) {
+ int con = cpm_uart_port_map[i];
+ cpm_uart_ports[con].port.line = i;
+ cpm_uart_ports[con].port.flags = UPF_BOOT_AUTOCONF;
+ uart_add_one_port(&cpm_reg, &cpm_uart_ports[con].port);
+ }
- for (i = 0; i < cpm_uart_nr; i++) {
- int con = cpm_uart_port_map[i];
- uart_remove_one_port(&cpm_reg, &cpm_uart_ports[con].port);
}
+ return ret;
+}
+static void __exit cpm_uart_exit(void)
+{
+ driver_unregister(&cpm_scc_uart_driver);
+ driver_unregister(&cpm_smc_uart_driver);
uart_unregister_driver(&cpm_reg);
}
void smc1_lineif(struct uart_cpm_port *pinfo)
{
- volatile cpm8xx_t *cp = cpmp;
-
- (void)cp; /* fix warning */
-#if defined (CONFIG_MPC885ADS)
- /* Enable SMC1 transceivers */
- {
- cp->cp_pepar |= 0x000000c0;
- cp->cp_pedir &= ~0x000000c0;
- cp->cp_peso &= ~0x00000040;
- cp->cp_peso |= 0x00000080;
- }
-#elif defined (CONFIG_MPC86XADS)
- unsigned int iobits = 0x000000c0;
-
- if (!pinfo->is_portb) {
- cp->cp_pbpar |= iobits;
- cp->cp_pbdir &= ~iobits;
- cp->cp_pbodr &= ~iobits;
- } else {
- ((immap_t *)IMAP_ADDR)->im_ioport.iop_papar |= iobits;
- ((immap_t *)IMAP_ADDR)->im_ioport.iop_padir &= ~iobits;
- ((immap_t *)IMAP_ADDR)->im_ioport.iop_paodr &= ~iobits;
- }
-#endif
pinfo->brg = 1;
}
void smc2_lineif(struct uart_cpm_port *pinfo)
{
- volatile cpm8xx_t *cp = cpmp;
-
- (void)cp; /* fix warning */
-#if defined (CONFIG_MPC885ADS)
- cp->cp_pepar |= 0x00000c00;
- cp->cp_pedir &= ~0x00000c00;
- cp->cp_peso &= ~0x00000400;
- cp->cp_peso |= 0x00000800;
-#elif defined (CONFIG_MPC86XADS)
- unsigned int iobits = 0x00000c00;
-
- if (!pinfo->is_portb) {
- cp->cp_pbpar |= iobits;
- cp->cp_pbdir &= ~iobits;
- cp->cp_pbodr &= ~iobits;
- } else {
- ((immap_t *)IMAP_ADDR)->im_ioport.iop_papar |= iobits;
- ((immap_t *)IMAP_ADDR)->im_ioport.iop_padir &= ~iobits;
- ((immap_t *)IMAP_ADDR)->im_ioport.iop_paodr &= ~iobits;
- }
-
-#endif
-
pinfo->brg = 2;
}
/* was hostalloc but changed cause it blows away the */
/* large tlb mapping when pinning the kernel area */
mem_addr = (u8 *) cpm_dpram_addr(cpm_dpalloc(memsz, 8));
- dma_addr = 0;
+ dma_addr = (u32)mem_addr;
} else
mem_addr = dma_alloc_coherent(NULL, memsz, &dma_addr,
GFP_KERNEL);
}
pinfo->dp_addr = dp_offset;
- pinfo->mem_addr = mem_addr;
- pinfo->dma_addr = dma_addr;
+ pinfo->mem_addr = mem_addr; /* virtual address*/
+ pinfo->dma_addr = dma_addr; /* physical address*/
+ pinfo->mem_size = memsz;
pinfo->rx_buf = mem_addr;
pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos
* be supported in a sane fashion.
*/
#ifndef CONFIG_STX_GP3
-#ifdef CONFIG_MPC8560_ADS
- volatile iop_cpm2_t *io = &cpm2_immr->im_ioport;
- io->iop_ppard |= 0x00000018;
- io->iop_psord &= ~0x00000008; /* Rx */
- io->iop_psord &= ~0x00000010; /* Tx */
- io->iop_pdird &= ~0x00000008; /* Rx */
- io->iop_pdird |= 0x00000010; /* Tx */
-#else
volatile iop_cpm2_t *io = &cpm2_immr->im_ioport;
io->iop_pparb |= 0x008b0000;
io->iop_pdirb |= 0x00880000;
io->iop_psorb |= 0x00880000;
io->iop_pdirb &= ~0x00030000;
io->iop_psorb &= ~0x00030000;
-#endif
#endif
cpm2_immr->im_cpmux.cmx_scr &= 0xff00ffff;
cpm2_immr->im_cpmux.cmx_scr |= 0x00090000;
memsz = L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize) +
L1_CACHE_ALIGN(pinfo->tx_nrfifos * pinfo->tx_fifosize);
- if (is_con)
+ if (is_con) {
mem_addr = alloc_bootmem(memsz);
+ dma_addr = mem_addr;
+ }
else
mem_addr = dma_alloc_coherent(NULL, memsz, &dma_addr,
GFP_KERNEL);
pinfo->dp_addr = dp_offset;
pinfo->mem_addr = mem_addr;
pinfo->dma_addr = dma_addr;
+ pinfo->mem_size = memsz;
pinfo->rx_buf = mem_addr;
pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL");
-/*
- * BRIEF MODULE DESCRIPTION
- * Au1200 LCD Driver.
- *
- * Copyright 2004-2005 AMD
- * Author: AMD
- *
- * Based on:
- * linux/drivers/video/skeletonfb.c -- Skeleton for a frame buffer device
- * Created 28 Dec 1997 by Geert Uytterhoeven
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/fb.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/ctype.h>
-#include <linux/dma-mapping.h>
-
-#include <asm/mach-au1x00/au1000.h>
-#include "au1200fb.h"
-
-#ifdef CONFIG_PM
-#include <asm/mach-au1x00/au1xxx_pm.h>
-#endif
-
-#ifndef CONFIG_FB_AU1200_DEVS
-#define CONFIG_FB_AU1200_DEVS 4
-#endif
-
-#define DRIVER_NAME "au1200fb"
-#define DRIVER_DESC "LCD controller driver for AU1200 processors"
-
-#define DEBUG 1
-
-#define print_err(f, arg...) printk(KERN_ERR DRIVER_NAME ": " f "\n", ## arg)
-#define print_warn(f, arg...) printk(KERN_WARNING DRIVER_NAME ": " f "\n", ## arg)
-#define print_info(f, arg...) printk(KERN_INFO DRIVER_NAME ": " f "\n", ## arg)
-
-#if DEBUG
-#define print_dbg(f, arg...) printk(KERN_DEBUG __FILE__ ": " f "\n", ## arg)
-#else
-#define print_dbg(f, arg...) do {} while (0)
-#endif
-
-
-#define AU1200_LCD_FB_IOCTL 0x46FF
-
-#define AU1200_LCD_SET_SCREEN 1
-#define AU1200_LCD_GET_SCREEN 2
-#define AU1200_LCD_SET_WINDOW 3
-#define AU1200_LCD_GET_WINDOW 4
-#define AU1200_LCD_SET_PANEL 5
-#define AU1200_LCD_GET_PANEL 6
-
-#define SCREEN_SIZE (1<< 1)
-#define SCREEN_BACKCOLOR (1<< 2)
-#define SCREEN_BRIGHTNESS (1<< 3)
-#define SCREEN_COLORKEY (1<< 4)
-#define SCREEN_MASK (1<< 5)
-
-struct au1200_lcd_global_regs_t {
- unsigned int flags;
- unsigned int xsize;
- unsigned int ysize;
- unsigned int backcolor;
- unsigned int brightness;
- unsigned int colorkey;
- unsigned int mask;
- unsigned int panel_choice;
- char panel_desc[80];
-
-};
-
-#define WIN_POSITION (1<< 0)
-#define WIN_ALPHA_COLOR (1<< 1)
-#define WIN_ALPHA_MODE (1<< 2)
-#define WIN_PRIORITY (1<< 3)
-#define WIN_CHANNEL (1<< 4)
-#define WIN_BUFFER_FORMAT (1<< 5)
-#define WIN_COLOR_ORDER (1<< 6)
-#define WIN_PIXEL_ORDER (1<< 7)
-#define WIN_SIZE (1<< 8)
-#define WIN_COLORKEY_MODE (1<< 9)
-#define WIN_DOUBLE_BUFFER_MODE (1<< 10)
-#define WIN_RAM_ARRAY_MODE (1<< 11)
-#define WIN_BUFFER_SCALE (1<< 12)
-#define WIN_ENABLE (1<< 13)
-
-struct au1200_lcd_window_regs_t {
- unsigned int flags;
- unsigned int xpos;
- unsigned int ypos;
- unsigned int alpha_color;
- unsigned int alpha_mode;
- unsigned int priority;
- unsigned int channel;
- unsigned int buffer_format;
- unsigned int color_order;
- unsigned int pixel_order;
- unsigned int xsize;
- unsigned int ysize;
- unsigned int colorkey_mode;
- unsigned int double_buffer_mode;
- unsigned int ram_array_mode;
- unsigned int xscale;
- unsigned int yscale;
- unsigned int enable;
-};
-
-
-struct au1200_lcd_iodata_t {
- unsigned int subcmd;
- struct au1200_lcd_global_regs_t global;
- struct au1200_lcd_window_regs_t window;
-};
-
-#if defined(__BIG_ENDIAN)
-#define LCD_CONTROL_DEFAULT_PO LCD_CONTROL_PO_11
-#else
-#define LCD_CONTROL_DEFAULT_PO LCD_CONTROL_PO_00
-#endif
-#define LCD_CONTROL_DEFAULT_SBPPF LCD_CONTROL_SBPPF_565
-
-/* Private, per-framebuffer management information (independent of the panel itself) */
-struct au1200fb_device {
- struct fb_info fb_info; /* FB driver info record */
-
- int plane;
- unsigned char* fb_mem; /* FrameBuffer memory map */
- unsigned int fb_len;
- dma_addr_t fb_phys;
-};
-
-static struct au1200fb_device _au1200fb_devices[CONFIG_FB_AU1200_DEVS];
-/********************************************************************/
-
-/* LCD controller restrictions */
-#define AU1200_LCD_MAX_XRES 1280
-#define AU1200_LCD_MAX_YRES 1024
-#define AU1200_LCD_MAX_BPP 32
-#define AU1200_LCD_MAX_CLK 96000000 /* fixme: this needs to go away ? */
-#define AU1200_LCD_NBR_PALETTE_ENTRIES 256
-
-/* Default number of visible screen buffer to allocate */
-#define AU1200FB_NBR_VIDEO_BUFFERS 1
-
-/********************************************************************/
-
-static struct au1200_lcd *lcd = (struct au1200_lcd *) AU1200_LCD_ADDR;
-static int window_index = 2; /* default is zero */
-static int panel_index = 2; /* default is zero */
-static struct window_settings *win;
-static struct panel_settings *panel;
-static int noblanking = 1;
-static int nohwcursor = 0;
-
-struct window_settings {
- unsigned char name[64];
- uint32 mode_backcolor;
- uint32 mode_colorkey;
- uint32 mode_colorkeymsk;
- struct {
- int xres;
- int yres;
- int xpos;
- int ypos;
- uint32 mode_winctrl1; /* winctrl1[FRM,CCO,PO,PIPE] */
- uint32 mode_winenable;
- } w[4];
-};
-
-#if defined(__BIG_ENDIAN)
-#define LCD_WINCTRL1_PO_16BPP LCD_WINCTRL1_PO_00
-#else
-#define LCD_WINCTRL1_PO_16BPP LCD_WINCTRL1_PO_01
-#endif
-
-extern int board_au1200fb_panel_init (void);
-extern int board_au1200fb_panel_shutdown (void);
-
-#ifdef CONFIG_PM
-int au1200fb_pm_callback(au1xxx_power_dev_t *dev,
- au1xxx_request_t request, void *data);
-au1xxx_power_dev_t *LCD_pm_dev;
-#endif
-
-/*
- * Default window configurations
- */
-static struct window_settings windows[] = {
- { /* Index 0 */
- "0-FS gfx, 1-video, 2-ovly gfx, 3-ovly gfx",
- /* mode_backcolor */ 0x006600ff,
- /* mode_colorkey,msk*/ 0, 0,
- {
- {
- /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
- /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565 |
- LCD_WINCTRL1_PO_16BPP,
- /* mode_winenable*/ LCD_WINENABLE_WEN0,
- },
- {
- /* xres, yres, xpos, ypos */ 100, 100, 100, 100,
- /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565 |
- LCD_WINCTRL1_PO_16BPP |
- LCD_WINCTRL1_PIPE,
- /* mode_winenable*/ LCD_WINENABLE_WEN1,
- },
- {
- /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
- /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565 |
- LCD_WINCTRL1_PO_16BPP,
- /* mode_winenable*/ 0,
- },
- {
- /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
- /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565 |
- LCD_WINCTRL1_PO_16BPP |
- LCD_WINCTRL1_PIPE,
- /* mode_winenable*/ 0,
- },
- },
- },
-
- { /* Index 1 */
- "0-FS gfx, 1-video, 2-ovly gfx, 3-ovly gfx",
- /* mode_backcolor */ 0x006600ff,
- /* mode_colorkey,msk*/ 0, 0,
- {
- {
- /* xres, yres, xpos, ypos */ 320, 240, 5, 5,
- /* mode_winctrl1 */ LCD_WINCTRL1_FRM_24BPP |
- LCD_WINCTRL1_PO_00,
- /* mode_winenable*/ LCD_WINENABLE_WEN0,
- },
- {
- /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
- /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565
- | LCD_WINCTRL1_PO_16BPP,
- /* mode_winenable*/ 0,
- },
- {
- /* xres, yres, xpos, ypos */ 100, 100, 0, 0,
- /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565 |
- LCD_WINCTRL1_PO_16BPP |
- LCD_WINCTRL1_PIPE,
- /* mode_winenable*/ 0/*LCD_WINENABLE_WEN2*/,
- },
- {
- /* xres, yres, xpos, ypos */ 200, 25, 0, 0,
- /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565 |
- LCD_WINCTRL1_PO_16BPP |
- LCD_WINCTRL1_PIPE,
- /* mode_winenable*/ 0,
- },
- },
- },
- { /* Index 2 */
- "0-FS gfx, 1-video, 2-ovly gfx, 3-ovly gfx",
- /* mode_backcolor */ 0x006600ff,
- /* mode_colorkey,msk*/ 0, 0,
- {
- {
- /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
- /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565 |
- LCD_WINCTRL1_PO_16BPP,
- /* mode_winenable*/ LCD_WINENABLE_WEN0,
- },
- {
- /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
- /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565 |
- LCD_WINCTRL1_PO_16BPP,
- /* mode_winenable*/ 0,
- },
- {
- /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
- /* mode_winctrl1 */ LCD_WINCTRL1_FRM_32BPP |
- LCD_WINCTRL1_PO_00|LCD_WINCTRL1_PIPE,
- /* mode_winenable*/ 0/*LCD_WINENABLE_WEN2*/,
- },
- {
- /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
- /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565 |
- LCD_WINCTRL1_PO_16BPP |
- LCD_WINCTRL1_PIPE,
- /* mode_winenable*/ 0,
- },
- },
- },
- /* Need VGA 640 @ 24bpp, @ 32bpp */
- /* Need VGA 800 @ 24bpp, @ 32bpp */
- /* Need VGA 1024 @ 24bpp, @ 32bpp */
-};
-
-/*
- * Controller configurations for various panels.
- */
-
-struct panel_settings
-{
- const char name[25]; /* Full name <vendor>_<model> */
-
- struct fb_monspecs monspecs; /* FB monitor specs */
-
- /* panel timings */
- uint32 mode_screen;
- uint32 mode_horztiming;
- uint32 mode_verttiming;
- uint32 mode_clkcontrol;
- uint32 mode_pwmdiv;
- uint32 mode_pwmhi;
- uint32 mode_outmask;
- uint32 mode_fifoctrl;
- uint32 mode_toyclksrc;
- uint32 mode_backlight;
- uint32 mode_auxpll;
- int (*device_init)(void);
- int (*device_shutdown)(void);
-#define Xres min_xres
-#define Yres min_yres
- u32 min_xres; /* Minimum horizontal resolution */
- u32 max_xres; /* Maximum horizontal resolution */
- u32 min_yres; /* Minimum vertical resolution */
- u32 max_yres; /* Maximum vertical resolution */
-};
-
-/********************************************************************/
-/* fixme: Maybe a modedb for the CRT ? otherwise panels should be as-is */
-
-/* List of panels known to work with the AU1200 LCD controller.
- * To add a new panel, enter the same specifications as the
- * Generic_TFT one, and MAKE SURE that it doesn't conflicts
- * with the controller restrictions. Restrictions are:
- *
- * STN color panels: max_bpp <= 12
- * STN mono panels: max_bpp <= 4
- * TFT panels: max_bpp <= 16
- * max_xres <= 800
- * max_yres <= 600
- */
-static struct panel_settings known_lcd_panels[] =
-{
- [0] = { /* QVGA 320x240 H:33.3kHz V:110Hz */
- .name = "QVGA_320x240",
- .monspecs = {
- .modedb = NULL,
- .modedb_len = 0,
- .hfmin = 30000,
- .hfmax = 70000,
- .vfmin = 60,
- .vfmax = 60,
- .dclkmin = 6000000,
- .dclkmax = 28000000,
- .input = FB_DISP_RGB,
- },
- .mode_screen = LCD_SCREEN_SX_N(320) |
- LCD_SCREEN_SY_N(240),
- .mode_horztiming = 0x00c4623b,
- .mode_verttiming = 0x00502814,
- .mode_clkcontrol = 0x00020002, /* /4=24Mhz */
- .mode_pwmdiv = 0x00000000,
- .mode_pwmhi = 0x00000000,
- .mode_outmask = 0x00FFFFFF,
- .mode_fifoctrl = 0x2f2f2f2f,
- .mode_toyclksrc = 0x00000004, /* AUXPLL directly */
- .mode_backlight = 0x00000000,
- .mode_auxpll = 8, /* 96MHz AUXPLL */
- .device_init = NULL,
- .device_shutdown = NULL,
- 320, 320,
- 240, 240,
- },
-
- [1] = { /* VGA 640x480 H:30.3kHz V:58Hz */
- .name = "VGA_640x480",
- .monspecs = {
- .modedb = NULL,
- .modedb_len = 0,
- .hfmin = 30000,
- .hfmax = 70000,
- .vfmin = 60,
- .vfmax = 60,
- .dclkmin = 6000000,
- .dclkmax = 28000000,
- .input = FB_DISP_RGB,
- },
- .mode_screen = 0x13f9df80,
- .mode_horztiming = 0x003c5859,
- .mode_verttiming = 0x00741201,
- .mode_clkcontrol = 0x00020001, /* /4=24Mhz */
- .mode_pwmdiv = 0x00000000,
- .mode_pwmhi = 0x00000000,
- .mode_outmask = 0x00FFFFFF,
- .mode_fifoctrl = 0x2f2f2f2f,
- .mode_toyclksrc = 0x00000004, /* AUXPLL directly */
- .mode_backlight = 0x00000000,
- .mode_auxpll = 8, /* 96MHz AUXPLL */
- .device_init = NULL,
- .device_shutdown = NULL,
- 640, 480,
- 640, 480,
- },
-
- [2] = { /* SVGA 800x600 H:46.1kHz V:69Hz */
- .name = "SVGA_800x600",
- .monspecs = {
- .modedb = NULL,
- .modedb_len = 0,
- .hfmin = 30000,
- .hfmax = 70000,
- .vfmin = 60,
- .vfmax = 60,
- .dclkmin = 6000000,
- .dclkmax = 28000000,
- .input = FB_DISP_RGB,
- },
- .mode_screen = 0x18fa5780,
- .mode_horztiming = 0x00dc7e77,
- .mode_verttiming = 0x00584805,
- .mode_clkcontrol = 0x00020000, /* /2=48Mhz */
- .mode_pwmdiv = 0x00000000,
- .mode_pwmhi = 0x00000000,
- .mode_outmask = 0x00FFFFFF,
- .mode_fifoctrl = 0x2f2f2f2f,
- .mode_toyclksrc = 0x00000004, /* AUXPLL directly */
- .mode_backlight = 0x00000000,
- .mode_auxpll = 8, /* 96MHz AUXPLL */
- .device_init = NULL,
- .device_shutdown = NULL,
- 800, 800,
- 600, 600,
- },
-
- [3] = { /* XVGA 1024x768 H:56.2kHz V:70Hz */
- .name = "XVGA_1024x768",
- .monspecs = {
- .modedb = NULL,
- .modedb_len = 0,
- .hfmin = 30000,
- .hfmax = 70000,
- .vfmin = 60,
- .vfmax = 60,
- .dclkmin = 6000000,
- .dclkmax = 28000000,
- .input = FB_DISP_RGB,
- },
- .mode_screen = 0x1ffaff80,
- .mode_horztiming = 0x007d0e57,
- .mode_verttiming = 0x00740a01,
- .mode_clkcontrol = 0x000A0000, /* /1 */
- .mode_pwmdiv = 0x00000000,
- .mode_pwmhi = 0x00000000,
- .mode_outmask = 0x00FFFFFF,
- .mode_fifoctrl = 0x2f2f2f2f,
- .mode_toyclksrc = 0x00000004, /* AUXPLL directly */
- .mode_backlight = 0x00000000,
- .mode_auxpll = 6, /* 72MHz AUXPLL */
- .device_init = NULL,
- .device_shutdown = NULL,
- 1024, 1024,
- 768, 768,
- },
-
- [4] = { /* XVGA XVGA 1280x1024 H:68.5kHz V:65Hz */
- .name = "XVGA_1280x1024",
- .monspecs = {
- .modedb = NULL,
- .modedb_len = 0,
- .hfmin = 30000,
- .hfmax = 70000,
- .vfmin = 60,
- .vfmax = 60,
- .dclkmin = 6000000,
- .dclkmax = 28000000,
- .input = FB_DISP_RGB,
- },
- .mode_screen = 0x27fbff80,
- .mode_horztiming = 0x00cdb2c7,
- .mode_verttiming = 0x00600002,
- .mode_clkcontrol = 0x000A0000, /* /1 */
- .mode_pwmdiv = 0x00000000,
- .mode_pwmhi = 0x00000000,
- .mode_outmask = 0x00FFFFFF,
- .mode_fifoctrl = 0x2f2f2f2f,
- .mode_toyclksrc = 0x00000004, /* AUXPLL directly */
- .mode_backlight = 0x00000000,
- .mode_auxpll = 10, /* 120MHz AUXPLL */
- .device_init = NULL,
- .device_shutdown = NULL,
- 1280, 1280,
- 1024, 1024,
- },
-
- [5] = { /* Samsung 1024x768 TFT */
- .name = "Samsung_1024x768_TFT",
- .monspecs = {
- .modedb = NULL,
- .modedb_len = 0,
- .hfmin = 30000,
- .hfmax = 70000,
- .vfmin = 60,
- .vfmax = 60,
- .dclkmin = 6000000,
- .dclkmax = 28000000,
- .input = FB_DISP_RGB,
- },
- .mode_screen = 0x1ffaff80,
- .mode_horztiming = 0x018cc677,
- .mode_verttiming = 0x00241217,
- .mode_clkcontrol = 0x00000000, /* SCB 0x1 /4=24Mhz */
- .mode_pwmdiv = 0x8000063f, /* SCB 0x0 */
- .mode_pwmhi = 0x03400000, /* SCB 0x0 */
- .mode_outmask = 0x00FFFFFF,
- .mode_fifoctrl = 0x2f2f2f2f,
- .mode_toyclksrc = 0x00000004, /* AUXPLL directly */
- .mode_backlight = 0x00000000,
- .mode_auxpll = 8, /* 96MHz AUXPLL */
- .device_init = board_au1200fb_panel_init,
- .device_shutdown = board_au1200fb_panel_shutdown,
- 1024, 1024,
- 768, 768,
- },
-
- [6] = { /* Toshiba 640x480 TFT */
- .name = "Toshiba_640x480_TFT",
- .monspecs = {
- .modedb = NULL,
- .modedb_len = 0,
- .hfmin = 30000,
- .hfmax = 70000,
- .vfmin = 60,
- .vfmax = 60,
- .dclkmin = 6000000,
- .dclkmax = 28000000,
- .input = FB_DISP_RGB,
- },
- .mode_screen = LCD_SCREEN_SX_N(640) |
- LCD_SCREEN_SY_N(480),
- .mode_horztiming = LCD_HORZTIMING_HPW_N(96) |
- LCD_HORZTIMING_HND1_N(13) | LCD_HORZTIMING_HND2_N(51),
- .mode_verttiming = LCD_VERTTIMING_VPW_N(2) |
- LCD_VERTTIMING_VND1_N(11) | LCD_VERTTIMING_VND2_N(32),
- .mode_clkcontrol = 0x00000000, /* /4=24Mhz */
- .mode_pwmdiv = 0x8000063f,
- .mode_pwmhi = 0x03400000,
- .mode_outmask = 0x00fcfcfc,
- .mode_fifoctrl = 0x2f2f2f2f,
- .mode_toyclksrc = 0x00000004, /* AUXPLL directly */
- .mode_backlight = 0x00000000,
- .mode_auxpll = 8, /* 96MHz AUXPLL */
- .device_init = board_au1200fb_panel_init,
- .device_shutdown = board_au1200fb_panel_shutdown,
- 640, 480,
- 640, 480,
- },
-
- [7] = { /* Sharp 320x240 TFT */
- .name = "Sharp_320x240_TFT",
- .monspecs = {
- .modedb = NULL,
- .modedb_len = 0,
- .hfmin = 12500,
- .hfmax = 20000,
- .vfmin = 38,
- .vfmax = 81,
- .dclkmin = 4500000,
- .dclkmax = 6800000,
- .input = FB_DISP_RGB,
- },
- .mode_screen = LCD_SCREEN_SX_N(320) |
- LCD_SCREEN_SY_N(240),
- .mode_horztiming = LCD_HORZTIMING_HPW_N(60) |
- LCD_HORZTIMING_HND1_N(13) | LCD_HORZTIMING_HND2_N(2),
- .mode_verttiming = LCD_VERTTIMING_VPW_N(2) |
- LCD_VERTTIMING_VND1_N(2) | LCD_VERTTIMING_VND2_N(5),
- .mode_clkcontrol = LCD_CLKCONTROL_PCD_N(7), /*16=6Mhz*/
- .mode_pwmdiv = 0x8000063f,
- .mode_pwmhi = 0x03400000,
- .mode_outmask = 0x00fcfcfc,
- .mode_fifoctrl = 0x2f2f2f2f,
- .mode_toyclksrc = 0x00000004, /* AUXPLL directly */
- .mode_backlight = 0x00000000,
- .mode_auxpll = 8, /* 96MHz AUXPLL */
- .device_init = board_au1200fb_panel_init,
- .device_shutdown = board_au1200fb_panel_shutdown,
- 320, 320,
- 240, 240,
- },
-
- [8] = { /* Toppoly TD070WGCB2 7" 856x480 TFT */
- .name = "Toppoly_TD070WGCB2",
- .monspecs = {
- .modedb = NULL,
- .modedb_len = 0,
- .hfmin = 30000,
- .hfmax = 70000,
- .vfmin = 60,
- .vfmax = 60,
- .dclkmin = 6000000,
- .dclkmax = 28000000,
- .input = FB_DISP_RGB,
- },
- .mode_screen = LCD_SCREEN_SX_N(856) |
- LCD_SCREEN_SY_N(480),
- .mode_horztiming = LCD_HORZTIMING_HND2_N(43) |
- LCD_HORZTIMING_HND1_N(43) | LCD_HORZTIMING_HPW_N(114),
- .mode_verttiming = LCD_VERTTIMING_VND2_N(20) |
- LCD_VERTTIMING_VND1_N(21) | LCD_VERTTIMING_VPW_N(4),
- .mode_clkcontrol = 0x00020001, /* /4=24Mhz */
- .mode_pwmdiv = 0x8000063f,
- .mode_pwmhi = 0x03400000,
- .mode_outmask = 0x00fcfcfc,
- .mode_fifoctrl = 0x2f2f2f2f,
- .mode_toyclksrc = 0x00000004, /* AUXPLL directly */
- .mode_backlight = 0x00000000,
- .mode_auxpll = 8, /* 96MHz AUXPLL */
- .device_init = board_au1200fb_panel_init,
- .device_shutdown = board_au1200fb_panel_shutdown,
- 856, 856,
- 480, 480,
- },
-};
-
-#define NUM_PANELS (ARRAY_SIZE(known_lcd_panels))
-
-/********************************************************************/
-
-#ifdef CONFIG_PM
-static int set_brightness(unsigned int brightness)
-{
- unsigned int hi1, divider;
-
- /* limit brightness pwm duty to >= 30/1600 */
- if (brightness < 30) {
- brightness = 30;
- }
- divider = (lcd->pwmdiv & 0x3FFFF) + 1;
- hi1 = (lcd->pwmhi >> 16) + 1;
- hi1 = (((brightness & 0xFF) + 1) * divider >> 8);
- lcd->pwmhi &= 0xFFFF;
- lcd->pwmhi |= (hi1 << 16);
-
- return brightness;
-}
-#endif /* CONFIG_PM */
-
-static int winbpp (unsigned int winctrl1)
-{
- int bits = 0;
-
- /* how many bits are needed for each pixel format */
- switch (winctrl1 & LCD_WINCTRL1_FRM) {
- case LCD_WINCTRL1_FRM_1BPP:
- bits = 1;
- break;
- case LCD_WINCTRL1_FRM_2BPP:
- bits = 2;
- break;
- case LCD_WINCTRL1_FRM_4BPP:
- bits = 4;
- break;
- case LCD_WINCTRL1_FRM_8BPP:
- bits = 8;
- break;
- case LCD_WINCTRL1_FRM_12BPP:
- case LCD_WINCTRL1_FRM_16BPP655:
- case LCD_WINCTRL1_FRM_16BPP565:
- case LCD_WINCTRL1_FRM_16BPP556:
- case LCD_WINCTRL1_FRM_16BPPI1555:
- case LCD_WINCTRL1_FRM_16BPPI5551:
- case LCD_WINCTRL1_FRM_16BPPA1555:
- case LCD_WINCTRL1_FRM_16BPPA5551:
- bits = 16;
- break;
- case LCD_WINCTRL1_FRM_24BPP:
- case LCD_WINCTRL1_FRM_32BPP:
- bits = 32;
- break;
- }
-
- return bits;
-}
-
-static int fbinfo2index (struct fb_info *fb_info)
-{
- int i;
-
- for (i = 0; i < CONFIG_FB_AU1200_DEVS; ++i) {
- if (fb_info == (struct fb_info *)(&_au1200fb_devices[i].fb_info))
- return i;
- }
- printk("au1200fb: ERROR: fbinfo2index failed!\n");
- return -1;
-}
-
-static int au1200_setlocation (struct au1200fb_device *fbdev, int plane,
- int xpos, int ypos)
-{
- uint32 winctrl0, winctrl1, winenable, fb_offset = 0;
- int xsz, ysz;
-
- /* FIX!!! NOT CHECKING FOR COMPLETE OFFSCREEN YET */
-
- winctrl0 = lcd->window[plane].winctrl0;
- winctrl1 = lcd->window[plane].winctrl1;
- winctrl0 &= (LCD_WINCTRL0_A | LCD_WINCTRL0_AEN);
- winctrl1 &= ~(LCD_WINCTRL1_SZX | LCD_WINCTRL1_SZY);
-
- /* Check for off-screen adjustments */
- xsz = win->w[plane].xres;
- ysz = win->w[plane].yres;
- if ((xpos + win->w[plane].xres) > panel->Xres) {
- /* Off-screen to the right */
- xsz = panel->Xres - xpos; /* off by 1 ??? */
- /*printk("off screen right\n");*/
- }
-
- if ((ypos + win->w[plane].yres) > panel->Yres) {
- /* Off-screen to the bottom */
- ysz = panel->Yres - ypos; /* off by 1 ??? */
- /*printk("off screen bottom\n");*/
- }
-
- if (xpos < 0) {
- /* Off-screen to the left */
- xsz = win->w[plane].xres + xpos;
- fb_offset += (((0 - xpos) * winbpp(lcd->window[plane].winctrl1))/8);
- xpos = 0;
- /*printk("off screen left\n");*/
- }
-
- if (ypos < 0) {
- /* Off-screen to the top */
- ysz = win->w[plane].yres + ypos;
- /* fixme: fb_offset += ((0-ypos)*fb_pars[plane].line_length); */
- ypos = 0;
- /*printk("off screen top\n");*/
- }
-
- /* record settings */
- win->w[plane].xpos = xpos;
- win->w[plane].ypos = ypos;
-
- xsz -= 1;
- ysz -= 1;
- winctrl0 |= (xpos << 21);
- winctrl0 |= (ypos << 10);
- winctrl1 |= (xsz << 11);
- winctrl1 |= (ysz << 0);
-
- /* Disable the window while making changes, then restore WINEN */
- winenable = lcd->winenable & (1 << plane);
- au_sync();
- lcd->winenable &= ~(1 << plane);
- lcd->window[plane].winctrl0 = winctrl0;
- lcd->window[plane].winctrl1 = winctrl1;
- lcd->window[plane].winbuf0 =
- lcd->window[plane].winbuf1 = fbdev->fb_phys;
- lcd->window[plane].winbufctrl = 0; /* select winbuf0 */
- lcd->winenable |= winenable;
- au_sync();
-
- return 0;
-}
-
-static void au1200_setpanel (struct panel_settings *newpanel)
-{
- /*
- * Perform global setup/init of LCD controller
- */
- uint32 winenable;
-
- /* Make sure all windows disabled */
- winenable = lcd->winenable;
- lcd->winenable = 0;
- au_sync();
- /*
- * Ensure everything is disabled before reconfiguring
- */
- if (lcd->screen & LCD_SCREEN_SEN) {
- /* Wait for vertical sync period */
- lcd->intstatus = LCD_INT_SS;
- while ((lcd->intstatus & LCD_INT_SS) == 0) {
- au_sync();
- }
-
- lcd->screen &= ~LCD_SCREEN_SEN; /*disable the controller*/
-
- do {
- lcd->intstatus = lcd->intstatus; /*clear interrupts*/
- au_sync();
- /*wait for controller to shut down*/
- } while ((lcd->intstatus & LCD_INT_SD) == 0);
-
- /* Call shutdown of current panel (if up) */
- /* this must occur last, because if an external clock is driving
- the controller, the clock cannot be turned off before first
- shutting down the controller.
- */
- if (panel->device_shutdown != NULL)
- panel->device_shutdown();
- }
-
- /* Newpanel == NULL indicates a shutdown operation only */
- if (newpanel == NULL)
- return;
-
- panel = newpanel;
-
- printk("Panel(%s), %dx%d\n", panel->name, panel->Xres, panel->Yres);
-
- /*
- * Setup clocking if internal LCD clock source (assumes sys_auxpll valid)
- */
- if (!(panel->mode_clkcontrol & LCD_CLKCONTROL_EXT))
- {
- uint32 sys_clksrc;
- au_writel(panel->mode_auxpll, SYS_AUXPLL);
- sys_clksrc = au_readl(SYS_CLKSRC) & ~0x0000001f;
- sys_clksrc |= panel->mode_toyclksrc;
- au_writel(sys_clksrc, SYS_CLKSRC);
- }
-
- /*
- * Configure panel timings
- */
- lcd->screen = panel->mode_screen;
- lcd->horztiming = panel->mode_horztiming;
- lcd->verttiming = panel->mode_verttiming;
- lcd->clkcontrol = panel->mode_clkcontrol;
- lcd->pwmdiv = panel->mode_pwmdiv;
- lcd->pwmhi = panel->mode_pwmhi;
- lcd->outmask = panel->mode_outmask;
- lcd->fifoctrl = panel->mode_fifoctrl;
- au_sync();
-
- /* fixme: Check window settings to make sure still valid
- * for new geometry */
-#if 0
- au1200_setlocation(fbdev, 0, win->w[0].xpos, win->w[0].ypos);
- au1200_setlocation(fbdev, 1, win->w[1].xpos, win->w[1].ypos);
- au1200_setlocation(fbdev, 2, win->w[2].xpos, win->w[2].ypos);
- au1200_setlocation(fbdev, 3, win->w[3].xpos, win->w[3].ypos);
-#endif
- lcd->winenable = winenable;
-
- /*
- * Re-enable screen now that it is configured
- */
- lcd->screen |= LCD_SCREEN_SEN;
- au_sync();
-
- /* Call init of panel */
- if (panel->device_init != NULL) panel->device_init();
-
- /* FIX!!!! not appropriate on panel change!!! Global setup/init */
- lcd->intenable = 0;
- lcd->intstatus = ~0;
- lcd->backcolor = win->mode_backcolor;
-
- /* Setup Color Key - FIX!!! */
- lcd->colorkey = win->mode_colorkey;
- lcd->colorkeymsk = win->mode_colorkeymsk;
-
- /* Setup HWCursor - FIX!!! Need to support this eventually */
- lcd->hwc.cursorctrl = 0;
- lcd->hwc.cursorpos = 0;
- lcd->hwc.cursorcolor0 = 0;
- lcd->hwc.cursorcolor1 = 0;
- lcd->hwc.cursorcolor2 = 0;
- lcd->hwc.cursorcolor3 = 0;
-
-
-#if 0
-#define D(X) printk("%25s: %08X\n", #X, X)
- D(lcd->screen);
- D(lcd->horztiming);
- D(lcd->verttiming);
- D(lcd->clkcontrol);
- D(lcd->pwmdiv);
- D(lcd->pwmhi);
- D(lcd->outmask);
- D(lcd->fifoctrl);
- D(lcd->window[0].winctrl0);
- D(lcd->window[0].winctrl1);
- D(lcd->window[0].winctrl2);
- D(lcd->window[0].winbuf0);
- D(lcd->window[0].winbuf1);
- D(lcd->window[0].winbufctrl);
- D(lcd->window[1].winctrl0);
- D(lcd->window[1].winctrl1);
- D(lcd->window[1].winctrl2);
- D(lcd->window[1].winbuf0);
- D(lcd->window[1].winbuf1);
- D(lcd->window[1].winbufctrl);
- D(lcd->window[2].winctrl0);
- D(lcd->window[2].winctrl1);
- D(lcd->window[2].winctrl2);
- D(lcd->window[2].winbuf0);
- D(lcd->window[2].winbuf1);
- D(lcd->window[2].winbufctrl);
- D(lcd->window[3].winctrl0);
- D(lcd->window[3].winctrl1);
- D(lcd->window[3].winctrl2);
- D(lcd->window[3].winbuf0);
- D(lcd->window[3].winbuf1);
- D(lcd->window[3].winbufctrl);
- D(lcd->winenable);
- D(lcd->intenable);
- D(lcd->intstatus);
- D(lcd->backcolor);
- D(lcd->winenable);
- D(lcd->colorkey);
- D(lcd->colorkeymsk);
- D(lcd->hwc.cursorctrl);
- D(lcd->hwc.cursorpos);
- D(lcd->hwc.cursorcolor0);
- D(lcd->hwc.cursorcolor1);
- D(lcd->hwc.cursorcolor2);
- D(lcd->hwc.cursorcolor3);
-#endif
-}
-
-static void au1200_setmode(struct au1200fb_device *fbdev)
-{
- int plane = fbdev->plane;
- /* Window/plane setup */
- lcd->window[plane].winctrl1 = ( 0
- | LCD_WINCTRL1_PRI_N(plane)
- | win->w[plane].mode_winctrl1 /* FRM,CCO,PO,PIPE */
- ) ;
-
- au1200_setlocation(fbdev, plane, win->w[plane].xpos, win->w[plane].ypos);
-
- lcd->window[plane].winctrl2 = ( 0
- | LCD_WINCTRL2_CKMODE_00
- | LCD_WINCTRL2_DBM
- | LCD_WINCTRL2_BX_N( fbdev->fb_info.fix.line_length)
- | LCD_WINCTRL2_SCX_1
- | LCD_WINCTRL2_SCY_1
- ) ;
- lcd->winenable |= win->w[plane].mode_winenable;
- au_sync();
-}
-
-
-/* Inline helpers */
-
-/*#define panel_is_dual(panel) ((panel->mode_screen & LCD_SCREEN_PT) == LCD_SCREEN_PT_010)*/
-/*#define panel_is_active(panel)((panel->mode_screen & LCD_SCREEN_PT) == LCD_SCREEN_PT_010)*/
-
-#define panel_is_color(panel) ((panel->mode_screen & LCD_SCREEN_PT) <= LCD_SCREEN_PT_CDSTN)
-
-/* Bitfields format supported by the controller. */
-static struct fb_bitfield rgb_bitfields[][4] = {
- /* Red, Green, Blue, Transp */
- [LCD_WINCTRL1_FRM_16BPP655 >> 25] =
- { { 10, 6, 0 }, { 5, 5, 0 }, { 0, 5, 0 }, { 0, 0, 0 } },
-
- [LCD_WINCTRL1_FRM_16BPP565 >> 25] =
- { { 11, 5, 0 }, { 5, 6, 0 }, { 0, 5, 0 }, { 0, 0, 0 } },
-
- [LCD_WINCTRL1_FRM_16BPP556 >> 25] =
- { { 11, 5, 0 }, { 6, 5, 0 }, { 0, 6, 0 }, { 0, 0, 0 } },
-
- [LCD_WINCTRL1_FRM_16BPPI1555 >> 25] =
- { { 10, 5, 0 }, { 5, 5, 0 }, { 0, 5, 0 }, { 0, 0, 0 } },
-
- [LCD_WINCTRL1_FRM_16BPPI5551 >> 25] =
- { { 11, 5, 0 }, { 6, 5, 0 }, { 1, 5, 0 }, { 0, 0, 0 } },
-
- [LCD_WINCTRL1_FRM_16BPPA1555 >> 25] =
- { { 10, 5, 0 }, { 5, 5, 0 }, { 0, 5, 0 }, { 15, 1, 0 } },
-
- [LCD_WINCTRL1_FRM_16BPPA5551 >> 25] =
- { { 11, 5, 0 }, { 6, 5, 0 }, { 1, 5, 0 }, { 0, 1, 0 } },
-
- [LCD_WINCTRL1_FRM_24BPP >> 25] =
- { { 16, 8, 0 }, { 8, 8, 0 }, { 0, 8, 0 }, { 0, 0, 0 } },
-
- [LCD_WINCTRL1_FRM_32BPP >> 25] =
- { { 16, 8, 0 }, { 8, 8, 0 }, { 0, 8, 0 }, { 24, 0, 0 } },
-};
-
-/*-------------------------------------------------------------------------*/
-
-/* Helpers */
-
-static void au1200fb_update_fbinfo(struct fb_info *fbi)
-{
- /* FIX!!!! This also needs to take the window pixel format into account!!! */
-
- /* Update var-dependent FB info */
- if (panel_is_color(panel)) {
- if (fbi->var.bits_per_pixel <= 8) {
- /* palettized */
- fbi->fix.visual = FB_VISUAL_PSEUDOCOLOR;
- fbi->fix.line_length = fbi->var.xres_virtual /
- (8/fbi->var.bits_per_pixel);
- } else {
- /* non-palettized */
- fbi->fix.visual = FB_VISUAL_TRUECOLOR;
- fbi->fix.line_length = fbi->var.xres_virtual * (fbi->var.bits_per_pixel / 8);
- }
- } else {
- /* mono FIX!!! mono 8 and 4 bits */
- fbi->fix.visual = FB_VISUAL_MONO10;
- fbi->fix.line_length = fbi->var.xres_virtual / 8;
- }
-
- fbi->screen_size = fbi->fix.line_length * fbi->var.yres_virtual;
- print_dbg("line length: %d\n", fbi->fix.line_length);
- print_dbg("bits_per_pixel: %d\n", fbi->var.bits_per_pixel);
-}
-
-/*-------------------------------------------------------------------------*/
-
-/* AU1200 framebuffer driver */
-
-/* fb_check_var
- * Validate var settings with hardware restrictions and modify it if necessary
- */
-static int au1200fb_fb_check_var(struct fb_var_screeninfo *var,
- struct fb_info *fbi)
-{
- struct au1200fb_device *fbdev = (struct au1200fb_device *)fbi;
- u32 pixclock;
- int screen_size, plane;
-
- plane = fbdev->plane;
-
- /* Make sure that the mode respect all LCD controller and
- * panel restrictions. */
- var->xres = win->w[plane].xres;
- var->yres = win->w[plane].yres;
-
- /* No need for virtual resolution support */
- var->xres_virtual = var->xres;
- var->yres_virtual = var->yres;
-
- var->bits_per_pixel = winbpp(win->w[plane].mode_winctrl1);
-
- screen_size = var->xres_virtual * var->yres_virtual;
- if (var->bits_per_pixel > 8) screen_size *= (var->bits_per_pixel / 8);
- else screen_size /= (8/var->bits_per_pixel);
-
- if (fbdev->fb_len < screen_size)
- return -EINVAL; /* Virtual screen is to big, abort */
-
- /* FIX!!!! what are the implicaitons of ignoring this for windows ??? */
- /* The max LCD clock is fixed to 48MHz (value of AUX_CLK). The pixel
- * clock can only be obtain by dividing this value by an even integer.
- * Fallback to a slower pixel clock if necessary. */
- pixclock = max((u32)(PICOS2KHZ(var->pixclock) * 1000), fbi->monspecs.dclkmin);
- pixclock = min(pixclock, min(fbi->monspecs.dclkmax, (u32)AU1200_LCD_MAX_CLK/2));
-
- if (AU1200_LCD_MAX_CLK % pixclock) {
- int diff = AU1200_LCD_MAX_CLK % pixclock;
- pixclock -= diff;
- }
-
- var->pixclock = KHZ2PICOS(pixclock/1000);
-#if 0
- if (!panel_is_active(panel)) {
- int pcd = AU1200_LCD_MAX_CLK / (pixclock * 2) - 1;
-
- if (!panel_is_color(panel)
- && (panel->control_base & LCD_CONTROL_MPI) && (pcd < 3)) {
- /* STN 8bit mono panel support is up to 6MHz pixclock */
- var->pixclock = KHZ2PICOS(6000);
- } else if (!pcd) {
- /* Other STN panel support is up to 12MHz */
- var->pixclock = KHZ2PICOS(12000);
- }
- }
-#endif
- /* Set bitfield accordingly */
- switch (var->bits_per_pixel) {
- case 16:
- {
- /* 16bpp True color.
- * These must be set to MATCH WINCTRL[FORM] */
- int idx;
- idx = (win->w[0].mode_winctrl1 & LCD_WINCTRL1_FRM) >> 25;
- var->red = rgb_bitfields[idx][0];
- var->green = rgb_bitfields[idx][1];
- var->blue = rgb_bitfields[idx][2];
- var->transp = rgb_bitfields[idx][3];
- break;
- }
-
- case 32:
- {
- /* 32bpp True color.
- * These must be set to MATCH WINCTRL[FORM] */
- int idx;
- idx = (win->w[0].mode_winctrl1 & LCD_WINCTRL1_FRM) >> 25;
- var->red = rgb_bitfields[idx][0];
- var->green = rgb_bitfields[idx][1];
- var->blue = rgb_bitfields[idx][2];
- var->transp = rgb_bitfields[idx][3];
- break;
- }
- default:
- print_dbg("Unsupported depth %dbpp", var->bits_per_pixel);
- return -EINVAL;
- }
-
- return 0;
-}
-
-/* fb_set_par
- * Set hardware with var settings. This will enable the controller with a
- * specific mode, normally validated with the fb_check_var method
- */
-static int au1200fb_fb_set_par(struct fb_info *fbi)
-{
- struct au1200fb_device *fbdev = (struct au1200fb_device *)fbi;
-
- au1200fb_update_fbinfo(fbi);
- au1200_setmode(fbdev);
-
- return 0;
-}
-
-/* fb_setcolreg
- * Set color in LCD palette.
- */
-static int au1200fb_fb_setcolreg(unsigned regno, unsigned red, unsigned green,
- unsigned blue, unsigned transp, struct fb_info *fbi)
-{
- volatile u32 *palette = lcd->palette;
- u32 value;
-
- if (regno > (AU1200_LCD_NBR_PALETTE_ENTRIES - 1))
- return -EINVAL;
-
- if (fbi->var.grayscale) {
- /* Convert color to grayscale */
- red = green = blue =
- (19595 * red + 38470 * green + 7471 * blue) >> 16;
- }
-
- if (fbi->fix.visual == FB_VISUAL_TRUECOLOR) {
- /* Place color in the pseudopalette */
- if (regno > 16)
- return -EINVAL;
-
- palette = (u32*) fbi->pseudo_palette;
-
- red >>= (16 - fbi->var.red.length);
- green >>= (16 - fbi->var.green.length);
- blue >>= (16 - fbi->var.blue.length);
-
- value = (red << fbi->var.red.offset) |
- (green << fbi->var.green.offset)|
- (blue << fbi->var.blue.offset);
- value &= 0xFFFF;
-
- } else if (1 /*FIX!!! panel_is_active(fbdev->panel)*/) {
- /* COLOR TFT PALLETTIZED (use RGB 565) */
- value = (red & 0xF800)|((green >> 5) &
- 0x07E0)|((blue >> 11) & 0x001F);
- value &= 0xFFFF;
-
- } else if (0 /*panel_is_color(fbdev->panel)*/) {
- /* COLOR STN MODE */
- value = 0x1234;
- value &= 0xFFF;
- } else {
- /* MONOCHROME MODE */
- value = (green >> 12) & 0x000F;
- value &= 0xF;
- }
-
- palette[regno] = value;
-
- return 0;
-}
-
-/* fb_blank
- * Blank the screen. Depending on the mode, the screen will be
- * activated with the backlight color, or desactivated
- */
-static int au1200fb_fb_blank(int blank_mode, struct fb_info *fbi)
-{
- /* Short-circuit screen blanking */
- if (noblanking)
- return 0;
-
- switch (blank_mode) {
-
- case FB_BLANK_UNBLANK:
- case FB_BLANK_NORMAL:
- /* printk("turn on panel\n"); */
- au1200_setpanel(panel);
- break;
- case FB_BLANK_VSYNC_SUSPEND:
- case FB_BLANK_HSYNC_SUSPEND:
- case FB_BLANK_POWERDOWN:
- /* printk("turn off panel\n"); */
- au1200_setpanel(NULL);
- break;
- default:
- break;
-
- }
-
- /* FB_BLANK_NORMAL is a soft blank */
- return (blank_mode == FB_BLANK_NORMAL) ? -EINVAL : 0;
-}
-
-/* fb_mmap
- * Map video memory in user space. We don't use the generic fb_mmap
- * method mainly to allow the use of the TLB streaming flag (CCA=6)
- */
-static int au1200fb_fb_mmap(struct fb_info *info, struct vm_area_struct *vma)
-
-{
- unsigned int len;
- unsigned long start=0, off;
- struct au1200fb_device *fbdev = (struct au1200fb_device *) info;
-
-#ifdef CONFIG_PM
- au1xxx_pm_access(LCD_pm_dev);
-#endif
-
- if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT)) {
- return -EINVAL;
- }
-
- start = fbdev->fb_phys & PAGE_MASK;
- len = PAGE_ALIGN((start & ~PAGE_MASK) + fbdev->fb_len);
-
- off = vma->vm_pgoff << PAGE_SHIFT;
-
- if ((vma->vm_end - vma->vm_start + off) > len) {
- return -EINVAL;
- }
-
- off += start;
- vma->vm_pgoff = off >> PAGE_SHIFT;
-
- vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
- pgprot_val(vma->vm_page_prot) |= _CACHE_MASK; /* CCA=7 */
-
- vma->vm_flags |= VM_IO;
-
- return io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT,
- vma->vm_end - vma->vm_start,
- vma->vm_page_prot);
-
- return 0;
-}
-
-static void set_global(u_int cmd, struct au1200_lcd_global_regs_t *pdata)
-{
-
- unsigned int hi1, divider;
-
- /* SCREEN_SIZE: user cannot reset size, must switch panel choice */
-
- if (pdata->flags & SCREEN_BACKCOLOR)
- lcd->backcolor = pdata->backcolor;
-
- if (pdata->flags & SCREEN_BRIGHTNESS) {
-
- // limit brightness pwm duty to >= 30/1600
- if (pdata->brightness < 30) {
- pdata->brightness = 30;
- }
- divider = (lcd->pwmdiv & 0x3FFFF) + 1;
- hi1 = (lcd->pwmhi >> 16) + 1;
- hi1 = (((pdata->brightness & 0xFF)+1) * divider >> 8);
- lcd->pwmhi &= 0xFFFF;
- lcd->pwmhi |= (hi1 << 16);
- }
-
- if (pdata->flags & SCREEN_COLORKEY)
- lcd->colorkey = pdata->colorkey;
-
- if (pdata->flags & SCREEN_MASK)
- lcd->colorkeymsk = pdata->mask;
- au_sync();
-}
-
-static void get_global(u_int cmd, struct au1200_lcd_global_regs_t *pdata)
-{
- unsigned int hi1, divider;
-
- pdata->xsize = ((lcd->screen & LCD_SCREEN_SX) >> 19) + 1;
- pdata->ysize = ((lcd->screen & LCD_SCREEN_SY) >> 8) + 1;
-
- pdata->backcolor = lcd->backcolor;
- pdata->colorkey = lcd->colorkey;
- pdata->mask = lcd->colorkeymsk;
-
- // brightness
- hi1 = (lcd->pwmhi >> 16) + 1;
- divider = (lcd->pwmdiv & 0x3FFFF) + 1;
- pdata->brightness = ((hi1 << 8) / divider) - 1;
- au_sync();
-}
-
-static void set_window(unsigned int plane,
- struct au1200_lcd_window_regs_t *pdata)
-{
- unsigned int val, bpp;
-
- /* Window control register 0 */
- if (pdata->flags & WIN_POSITION) {
- val = lcd->window[plane].winctrl0 & ~(LCD_WINCTRL0_OX |
- LCD_WINCTRL0_OY);
- val |= ((pdata->xpos << 21) & LCD_WINCTRL0_OX);
- val |= ((pdata->ypos << 10) & LCD_WINCTRL0_OY);
- lcd->window[plane].winctrl0 = val;
- }
- if (pdata->flags & WIN_ALPHA_COLOR) {
- val = lcd->window[plane].winctrl0 & ~(LCD_WINCTRL0_A);
- val |= ((pdata->alpha_color << 2) & LCD_WINCTRL0_A);
- lcd->window[plane].winctrl0 = val;
- }
- if (pdata->flags & WIN_ALPHA_MODE) {
- val = lcd->window[plane].winctrl0 & ~(LCD_WINCTRL0_AEN);
- val |= ((pdata->alpha_mode << 1) & LCD_WINCTRL0_AEN);
- lcd->window[plane].winctrl0 = val;
- }
-
- /* Window control register 1 */
- if (pdata->flags & WIN_PRIORITY) {
- val = lcd->window[plane].winctrl1 & ~(LCD_WINCTRL1_PRI);
- val |= ((pdata->priority << 30) & LCD_WINCTRL1_PRI);
- lcd->window[plane].winctrl1 = val;
- }
- if (pdata->flags & WIN_CHANNEL) {
- val = lcd->window[plane].winctrl1 & ~(LCD_WINCTRL1_PIPE);
- val |= ((pdata->channel << 29) & LCD_WINCTRL1_PIPE);
- lcd->window[plane].winctrl1 = val;
- }
- if (pdata->flags & WIN_BUFFER_FORMAT) {
- val = lcd->window[plane].winctrl1 & ~(LCD_WINCTRL1_FRM);
- val |= ((pdata->buffer_format << 25) & LCD_WINCTRL1_FRM);
- lcd->window[plane].winctrl1 = val;
- }
- if (pdata->flags & WIN_COLOR_ORDER) {
- val = lcd->window[plane].winctrl1 & ~(LCD_WINCTRL1_CCO);
- val |= ((pdata->color_order << 24) & LCD_WINCTRL1_CCO);
- lcd->window[plane].winctrl1 = val;
- }
- if (pdata->flags & WIN_PIXEL_ORDER) {
- val = lcd->window[plane].winctrl1 & ~(LCD_WINCTRL1_PO);
- val |= ((pdata->pixel_order << 22) & LCD_WINCTRL1_PO);
- lcd->window[plane].winctrl1 = val;
- }
- if (pdata->flags & WIN_SIZE) {
- val = lcd->window[plane].winctrl1 & ~(LCD_WINCTRL1_SZX |
- LCD_WINCTRL1_SZY);
- val |= (((pdata->xsize << 11) - 1) & LCD_WINCTRL1_SZX);
- val |= (((pdata->ysize) - 1) & LCD_WINCTRL1_SZY);
- lcd->window[plane].winctrl1 = val;
- /* program buffer line width */
- bpp = winbpp(val) / 8;
- val = lcd->window[plane].winctrl2 & ~(LCD_WINCTRL2_BX);
- val |= (((pdata->xsize * bpp) << 8) & LCD_WINCTRL2_BX);
- lcd->window[plane].winctrl2 = val;
- }
-
- /* Window control register 2 */
- if (pdata->flags & WIN_COLORKEY_MODE) {
- val = lcd->window[plane].winctrl2 & ~(LCD_WINCTRL2_CKMODE);
- val |= ((pdata->colorkey_mode << 24) & LCD_WINCTRL2_CKMODE);
- lcd->window[plane].winctrl2 = val;
- }
- if (pdata->flags & WIN_DOUBLE_BUFFER_MODE) {
- val = lcd->window[plane].winctrl2 & ~(LCD_WINCTRL2_DBM);
- val |= ((pdata->double_buffer_mode << 23) & LCD_WINCTRL2_DBM);
- lcd->window[plane].winctrl2 = val;
- }
- if (pdata->flags & WIN_RAM_ARRAY_MODE) {
- val = lcd->window[plane].winctrl2 & ~(LCD_WINCTRL2_RAM);
- val |= ((pdata->ram_array_mode << 21) & LCD_WINCTRL2_RAM);
- lcd->window[plane].winctrl2 = val;
- }
-
- /* Buffer line width programmed with WIN_SIZE */
-
- if (pdata->flags & WIN_BUFFER_SCALE) {
- val = lcd->window[plane].winctrl2 & ~(LCD_WINCTRL2_SCX |
- LCD_WINCTRL2_SCY);
- val |= ((pdata->xsize << 11) & LCD_WINCTRL2_SCX);
- val |= ((pdata->ysize) & LCD_WINCTRL2_SCY);
- lcd->window[plane].winctrl2 = val;
- }
-
- if (pdata->flags & WIN_ENABLE) {
- val = lcd->winenable;
- val &= ~(1<<plane);
- val |= (pdata->enable & 1) << plane;
- lcd->winenable = val;
- }
- au_sync();
-}
-
-static void get_window(unsigned int plane,
- struct au1200_lcd_window_regs_t *pdata)
-{
- /* Window control register 0 */
- pdata->xpos = (lcd->window[plane].winctrl0 & LCD_WINCTRL0_OX) >> 21;
- pdata->ypos = (lcd->window[plane].winctrl0 & LCD_WINCTRL0_OY) >> 10;
- pdata->alpha_color = (lcd->window[plane].winctrl0 & LCD_WINCTRL0_A) >> 2;
- pdata->alpha_mode = (lcd->window[plane].winctrl0 & LCD_WINCTRL0_AEN) >> 1;
-
- /* Window control register 1 */
- pdata->priority = (lcd->window[plane].winctrl1& LCD_WINCTRL1_PRI) >> 30;
- pdata->channel = (lcd->window[plane].winctrl1 & LCD_WINCTRL1_PIPE) >> 29;
- pdata->buffer_format = (lcd->window[plane].winctrl1 & LCD_WINCTRL1_FRM) >> 25;
- pdata->color_order = (lcd->window[plane].winctrl1 & LCD_WINCTRL1_CCO) >> 24;
- pdata->pixel_order = (lcd->window[plane].winctrl1 & LCD_WINCTRL1_PO) >> 22;
- pdata->xsize = ((lcd->window[plane].winctrl1 & LCD_WINCTRL1_SZX) >> 11) + 1;
- pdata->ysize = (lcd->window[plane].winctrl1 & LCD_WINCTRL1_SZY) + 1;
-
- /* Window control register 2 */
- pdata->colorkey_mode = (lcd->window[plane].winctrl2 & LCD_WINCTRL2_CKMODE) >> 24;
- pdata->double_buffer_mode = (lcd->window[plane].winctrl2 & LCD_WINCTRL2_DBM) >> 23;
- pdata->ram_array_mode = (lcd->window[plane].winctrl2 & LCD_WINCTRL2_RAM) >> 21;
-
- pdata->enable = (lcd->winenable >> plane) & 1;
- au_sync();
-}
-
-static int au1200fb_ioctl(struct fb_info *info, unsigned int cmd,
- unsigned long arg)
-{
- int plane;
- int val;
-
-#ifdef CONFIG_PM
- au1xxx_pm_access(LCD_pm_dev);
-#endif
-
- plane = fbinfo2index(info);
- print_dbg("au1200fb: ioctl %d on plane %d\n", cmd, plane);
-
- if (cmd == AU1200_LCD_FB_IOCTL) {
- struct au1200_lcd_iodata_t iodata;
-
- if (copy_from_user(&iodata, (void __user *) arg, sizeof(iodata)))
- return -EFAULT;
-
- print_dbg("FB IOCTL called\n");
-
- switch (iodata.subcmd) {
- case AU1200_LCD_SET_SCREEN:
- print_dbg("AU1200_LCD_SET_SCREEN\n");
- set_global(cmd, &iodata.global);
- break;
-
- case AU1200_LCD_GET_SCREEN:
- print_dbg("AU1200_LCD_GET_SCREEN\n");
- get_global(cmd, &iodata.global);
- break;
-
- case AU1200_LCD_SET_WINDOW:
- print_dbg("AU1200_LCD_SET_WINDOW\n");
- set_window(plane, &iodata.window);
- break;
-
- case AU1200_LCD_GET_WINDOW:
- print_dbg("AU1200_LCD_GET_WINDOW\n");
- get_window(plane, &iodata.window);
- break;
-
- case AU1200_LCD_SET_PANEL:
- print_dbg("AU1200_LCD_SET_PANEL\n");
- if ((iodata.global.panel_choice >= 0) &&
- (iodata.global.panel_choice <
- NUM_PANELS))
- {
- struct panel_settings *newpanel;
- panel_index = iodata.global.panel_choice;
- newpanel = &known_lcd_panels[panel_index];
- au1200_setpanel(newpanel);
- }
- break;
-
- case AU1200_LCD_GET_PANEL:
- print_dbg("AU1200_LCD_GET_PANEL\n");
- iodata.global.panel_choice = panel_index;
- break;
-
- default:
- return -EINVAL;
- }
-
- val = copy_to_user((void __user *) arg, &iodata, sizeof(iodata));
- if (val) {
- print_dbg("error: could not copy %d bytes\n", val);
- return -EFAULT;
- }
- }
-
- return 0;
-}
-
-
-static struct fb_ops au1200fb_fb_ops = {
- .owner = THIS_MODULE,
- .fb_check_var = au1200fb_fb_check_var,
- .fb_set_par = au1200fb_fb_set_par,
- .fb_setcolreg = au1200fb_fb_setcolreg,
- .fb_blank = au1200fb_fb_blank,
- .fb_fillrect = cfb_fillrect,
- .fb_copyarea = cfb_copyarea,
- .fb_imageblit = cfb_imageblit,
- .fb_sync = NULL,
- .fb_ioctl = au1200fb_ioctl,
- .fb_mmap = au1200fb_fb_mmap,
-};
-
-/*-------------------------------------------------------------------------*/
-
-static irqreturn_t au1200fb_handle_irq(int irq, void* dev_id, struct pt_regs *regs)
-{
- /* Nothing to do for now, just clear any pending interrupt */
- lcd->intstatus = lcd->intstatus;
- au_sync();
-
- return IRQ_HANDLED;
-}
-
-/*-------------------------------------------------------------------------*/
-
-/* AU1200 LCD device probe helpers */
-
-static int au1200fb_init_fbinfo(struct au1200fb_device *fbdev)
-{
- struct fb_info *fbi = &fbdev->fb_info;
- int bpp;
-
- memset(fbi, 0, sizeof(struct fb_info));
- fbi->fbops = &au1200fb_fb_ops;
-
- bpp = winbpp(win->w[fbdev->plane].mode_winctrl1);
-
- /* Copy monitor specs from panel data */
- /* fixme: we're setting up LCD controller windows, so these dont give a
- damn as to what the monitor specs are (the panel itself does, but that
- isnt done here...so maybe need a generic catchall monitor setting??? */
- memcpy(&fbi->monspecs, &panel->monspecs, sizeof(struct fb_monspecs));
-
- /* We first try the user mode passed in argument. If that failed,
- * or if no one has been specified, we default to the first mode of the
- * panel list. Note that after this call, var data will be set */
- if (!fb_find_mode(&fbi->var,
- fbi,
- NULL, /* drv_info.opt_mode, */
- fbi->monspecs.modedb,
- fbi->monspecs.modedb_len,
- fbi->monspecs.modedb,
- bpp)) {
-
- print_err("Cannot find valid mode for panel %s", panel->name);
- return -EFAULT;
- }
-
- fbi->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL);
- if (!fbi->pseudo_palette) {
- return -ENOMEM;
- }
- memset(fbi->pseudo_palette, 0, sizeof(u32) * 16);
-
- if (fb_alloc_cmap(&fbi->cmap, AU1200_LCD_NBR_PALETTE_ENTRIES, 0) < 0) {
- print_err("Fail to allocate colormap (%d entries)",
- AU1200_LCD_NBR_PALETTE_ENTRIES);
- kfree(fbi->pseudo_palette);
- return -EFAULT;
- }
-
- strncpy(fbi->fix.id, "AU1200", sizeof(fbi->fix.id));
- fbi->fix.smem_start = fbdev->fb_phys;
- fbi->fix.smem_len = fbdev->fb_len;
- fbi->fix.type = FB_TYPE_PACKED_PIXELS;
- fbi->fix.xpanstep = 0;
- fbi->fix.ypanstep = 0;
- fbi->fix.mmio_start = 0;
- fbi->fix.mmio_len = 0;
- fbi->fix.accel = FB_ACCEL_NONE;
-
- fbi->screen_base = (char __iomem *) fbdev->fb_mem;
-
- au1200fb_update_fbinfo(fbi);
-
- return 0;
-}
-
-/*-------------------------------------------------------------------------*/
-
-/* AU1200 LCD controller device driver */
-
-static int au1200fb_drv_probe(struct device *dev)
-{
- struct au1200fb_device *fbdev;
- unsigned long page;
- int bpp, plane, ret;
-
- if (!dev)
- return -EINVAL;
-
- for (plane = 0; plane < CONFIG_FB_AU1200_DEVS; ++plane) {
- bpp = winbpp(win->w[plane].mode_winctrl1);
- if (win->w[plane].xres == 0)
- win->w[plane].xres = panel->Xres;
- if (win->w[plane].yres == 0)
- win->w[plane].yres = panel->Yres;
-
- fbdev = &_au1200fb_devices[plane];
- memset(fbdev, 0, sizeof(struct au1200fb_device));
- fbdev->plane = plane;
-
- /* Allocate the framebuffer to the maximum screen size */
- fbdev->fb_len = (win->w[plane].xres * win->w[plane].yres * bpp) / 8;
-
- fbdev->fb_mem = dma_alloc_noncoherent(dev,
- PAGE_ALIGN(fbdev->fb_len),
- &fbdev->fb_phys, GFP_KERNEL);
- if (!fbdev->fb_mem) {
- print_err("fail to allocate frambuffer (size: %dK))",
- fbdev->fb_len / 1024);
- return -ENOMEM;
- }
-
- /*
- * Set page reserved so that mmap will work. This is necessary
- * since we'll be remapping normal memory.
- */
- for (page = (unsigned long)fbdev->fb_phys;
- page < PAGE_ALIGN((unsigned long)fbdev->fb_phys +
- fbdev->fb_len);
- page += PAGE_SIZE) {
- SetPageReserved(pfn_to_page(page >> PAGE_SHIFT)); /* LCD DMA is NOT coherent on Au1200 */
- }
- print_dbg("Framebuffer memory map at %p", fbdev->fb_mem);
- print_dbg("phys=0x%08x, size=%dK", fbdev->fb_phys, fbdev->fb_len / 1024);
-
- /* Init FB data */
- if ((ret = au1200fb_init_fbinfo(fbdev)) < 0)
- goto failed;
-
- /* Register new framebuffer */
- if ((ret = register_framebuffer(&fbdev->fb_info)) < 0) {
- print_err("cannot register new framebuffer");
- goto failed;
- }
-
- au1200fb_fb_set_par(&fbdev->fb_info);
-
-#if !defined(CONFIG_FRAMEBUFFER_CONSOLE) && defined(CONFIG_LOGO)
- if (plane == 0)
- if (fb_prepare_logo(&fbdev->fb_info, FB_ROTATE_UR)) {
- /* Start display and show logo on boot */
- fb_set_cmap(&fbdev->fb_info.cmap,
- &fbdev->fb_info);
-
- fb_show_logo(&fbdev->fb_info, FB_ROTATE_UR);
- }
-#endif
- }
-
- /* Now hook interrupt too */
- if ((ret = request_irq(AU1200_LCD_INT, au1200fb_handle_irq,
- SA_INTERRUPT | SA_SHIRQ, "lcd", (void *)dev)) < 0) {
- print_err("fail to request interrupt line %d (err: %d)",
- AU1200_LCD_INT, ret);
- goto failed;
- }
-
- return 0;
-
-failed:
- /* NOTE: This only does the current plane/window that failed; others are still active */
- if (fbdev->fb_mem)
- dma_free_noncoherent(dev, PAGE_ALIGN(fbdev->fb_len),
- fbdev->fb_mem, fbdev->fb_phys);
- if (fbdev->fb_info.cmap.len != 0)
- fb_dealloc_cmap(&fbdev->fb_info.cmap);
- if (fbdev->fb_info.pseudo_palette)
- kfree(fbdev->fb_info.pseudo_palette);
- if (plane == 0)
- free_irq(AU1200_LCD_INT, (void*)dev);
- return ret;
-}
-
-static int au1200fb_drv_remove(struct device *dev)
-{
- struct au1200fb_device *fbdev;
- int plane;
-
- if (!dev)
- return -ENODEV;
-
- /* Turn off the panel */
- au1200_setpanel(NULL);
-
- for (plane = 0; plane < CONFIG_FB_AU1200_DEVS; ++plane)
- {
- fbdev = &_au1200fb_devices[plane];
-
- /* Clean up all probe data */
- unregister_framebuffer(&fbdev->fb_info);
- if (fbdev->fb_mem)
- dma_free_noncoherent(dev, PAGE_ALIGN(fbdev->fb_len),
- fbdev->fb_mem, fbdev->fb_phys);
- if (fbdev->fb_info.cmap.len != 0)
- fb_dealloc_cmap(&fbdev->fb_info.cmap);
- if (fbdev->fb_info.pseudo_palette)
- kfree(fbdev->fb_info.pseudo_palette);
- }
-
- free_irq(AU1200_LCD_INT, (void *)dev);
-
- return 0;
-}
-
-#ifdef CONFIG_PM
-static int au1200fb_drv_suspend(struct device *dev, u32 state, u32 level)
-{
- /* TODO */
- return 0;
-}
-
-static int au1200fb_drv_resume(struct device *dev, u32 level)
-{
- /* TODO */
- return 0;
-}
-#endif /* CONFIG_PM */
-
-static struct device_driver au1200fb_driver = {
- .name = "au1200-lcd",
- .bus = &platform_bus_type,
- .probe = au1200fb_drv_probe,
- .remove = au1200fb_drv_remove,
-#ifdef CONFIG_PM
- .suspend = au1200fb_drv_suspend,
- .resume = au1200fb_drv_resume,
-#endif
-};
-
-/*-------------------------------------------------------------------------*/
-
-/* Kernel driver */
-
-static void au1200fb_setup(void)
-{
- char* options = NULL;
- char* this_opt;
- int num_panels = ARRAY_SIZE(known_lcd_panels);
- int panel_idx = -1;
-
- fb_get_options(DRIVER_NAME, &options);
-
- if (options) {
- while ((this_opt = strsep(&options,",")) != NULL) {
- /* Panel option - can be panel name,
- * "bs" for board-switch, or number/index */
- if (!strncmp(this_opt, "panel:", 6)) {
- int i;
- long int li;
- char *endptr;
- this_opt += 6;
- /* First check for index, which allows
- * to short circuit this mess */
- li = simple_strtol(this_opt, &endptr, 0);
- if (*endptr == '\0') {
- panel_idx = (int)li;
- }
- else if (strcmp(this_opt, "bs") == 0) {
- extern int board_au1200fb_panel(void);
- panel_idx = board_au1200fb_panel();
- }
-
- else
- for (i = 0; i < num_panels; i++) {
- if (!strcmp(this_opt, known_lcd_panels[i].name)) {
- panel_idx = i;
- break;
- }
- }
-
- if ((panel_idx < 0) || (panel_idx >= num_panels)) {
- print_warn("Panel %s not supported!", this_opt);
- }
- else
- panel_index = panel_idx;
- }
-
- else if (strncmp(this_opt, "nohwcursor", 10) == 0) {
- nohwcursor = 1;
- }
-
- /* Unsupported option */
- else {
- print_warn("Unsupported option \"%s\"", this_opt);
- }
- }
- }
-}
-
-#ifdef CONFIG_PM
-static int au1200fb_pm_callback(au1xxx_power_dev_t *dev,
- au1xxx_request_t request, void *data) {
- int retval = -1;
- unsigned int d = 0;
- unsigned int brightness = 0;
-
- if (request == AU1XXX_PM_SLEEP) {
- board_au1200fb_panel_shutdown();
- }
- else if (request == AU1XXX_PM_WAKEUP) {
- if(dev->prev_state == SLEEP_STATE)
- {
- int plane;
- au1200_setpanel(panel);
- for (plane = 0; plane < CONFIG_FB_AU1200_DEVS; ++plane) {
- struct au1200fb_device *fbdev;
- fbdev = &_au1200fb_devices[plane];
- au1200fb_fb_set_par(&fbdev->fb_info);
- }
- }
-
- d = *((unsigned int*)data);
- if(d <=10) brightness = 26;
- else if(d<=20) brightness = 51;
- else if(d<=30) brightness = 77;
- else if(d<=40) brightness = 102;
- else if(d<=50) brightness = 128;
- else if(d<=60) brightness = 153;
- else if(d<=70) brightness = 179;
- else if(d<=80) brightness = 204;
- else if(d<=90) brightness = 230;
- else brightness = 255;
- set_brightness(brightness);
- } else if (request == AU1XXX_PM_GETSTATUS) {
- return dev->cur_state;
- } else if (request == AU1XXX_PM_ACCESS) {
- if (dev->cur_state != SLEEP_STATE)
- return retval;
- else {
- au1200_setpanel(panel);
- }
- } else if (request == AU1XXX_PM_IDLE) {
- } else if (request == AU1XXX_PM_CLEANUP) {
- }
-
- return retval;
-}
-#endif
-
-static int __init au1200fb_init(void)
-{
- print_info("" DRIVER_DESC "");
-
- /* Setup driver with options */
- au1200fb_setup();
-
- /* Point to the panel selected */
- panel = &known_lcd_panels[panel_index];
- win = &windows[window_index];
-
- printk(DRIVER_NAME ": Panel %d %s\n", panel_index, panel->name);
- printk(DRIVER_NAME ": Win %d %s\n", window_index, win->name);
-
- /* Kickstart the panel, the framebuffers/windows come soon enough */
- au1200_setpanel(panel);
-
- #ifdef CONFIG_PM
- LCD_pm_dev = new_au1xxx_power_device("LCD", &au1200fb_pm_callback, NULL);
- if ( LCD_pm_dev == NULL)
- printk(KERN_INFO "Unable to create a power management device entry for the au1200fb.\n");
- else
- printk(KERN_INFO "Power management device entry for the au1200fb loaded.\n");
- #endif
-
- return driver_register(&au1200fb_driver);
-}
-
-static void __exit au1200fb_cleanup(void)
-{
- driver_unregister(&au1200fb_driver);
-}
-
-module_init(au1200fb_init);
-module_exit(au1200fb_cleanup);
-
-MODULE_DESCRIPTION(DRIVER_DESC);
-MODULE_LICENSE("GPL");
return error;
}
-#ifndef __ARCH_WANT_STAT64
+#if !defined(__ARCH_WANT_STAT64) || defined(__ARCH_WANT_SYS_NEWFSTATAT)
asmlinkage long sys_newfstatat(int dfd, char __user *filename,
struct stat __user *statbuf, int flag)
{
alternative_input(
"fnsave %[fx] ;fwait;" GENERIC_NOP8 GENERIC_NOP4,
"fxsave %[fx]\n"
- "bt $7,%[fsw] ; jc 1f ; fnclex\n1:",
+ "bt $7,%[fsw] ; jnc 1f ; fnclex\n1:",
X86_FEATURE_FXSR,
[fx] "m" (tsk->thread.i387.fxsave),
[fsw] "m" (tsk->thread.i387.fxsave.swd) : "memory");
/* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
is pending. Clear the x87 state here by setting it to fixed
- values. __per_cpu_offset[0] is a random variable that should be in L1 */
+ values. safe_address is a random variable that should be in L1 */
alternative_input(
GENERIC_NOP8 GENERIC_NOP2,
"emms\n\t" /* clear stack tags */
#define PPC_FEATURE_BOOKE 0x00008000
#define PPC_FEATURE_SMT 0x00004000
#define PPC_FEATURE_ICACHE_SNOOP 0x00002000
+#define PPC_FEATURE_ARCH_2_05 0x00001000
#ifdef __KERNEL__
#ifndef __ASSEMBLY__
CPU_FTR_MMCRA | CPU_FTR_SMT | \
CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
CPU_FTR_MMCRA_SIHV | CPU_FTR_PURR)
+#define CPU_FTRS_POWER6 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
+ CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
+ CPU_FTR_MMCRA | CPU_FTR_SMT | \
+ CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
+ CPU_FTR_PURR | CPU_FTR_CI_LARGE_PAGE)
#define CPU_FTRS_CELL (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
#ifdef __powerpc64__
#define CPU_FTRS_POSSIBLE \
(CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 | \
- CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_CELL | \
- CPU_FTR_CI_LARGE_PAGE)
+ CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 | \
+ CPU_FTRS_CELL | CPU_FTR_CI_LARGE_PAGE)
#else
enum {
CPU_FTRS_POSSIBLE =
#ifdef __powerpc64__
#define CPU_FTRS_ALWAYS \
(CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 & \
- CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_CELL & \
- CPU_FTRS_POSSIBLE)
+ CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_POWER6 & \
+ CPU_FTRS_CELL & CPU_FTRS_POSSIBLE)
#else
enum {
CPU_FTRS_ALWAYS =
* 2 of the License, or (at your option) any later version.
*/
+/* Check of existence of legacy devices */
+extern int check_legacy_ioport(unsigned long base_port);
+
#ifndef CONFIG_PPC64
#include <asm-ppc/io.h>
#else
#define dma_cache_wback(_start,_size) do { } while (0)
#define dma_cache_wback_inv(_start,_size) do { } while (0)
-/* Check of existence of legacy devices */
-extern int check_legacy_ioport(unsigned long base_port);
-
/*
* Convert a physical pointer to a virtual kernel pointer for /dev/mem
- (1U << GET_HTLB_AREA(addr))) & 0xffff)
#define ARCH_HAS_HUGEPAGE_ONLY_RANGE
+#define ARCH_HAS_HUGETLB_FREE_PGD_RANGE
#define ARCH_HAS_PREPARE_HUGEPAGE_RANGE
#define ARCH_HAS_SETCLEAR_HUGE_PTE
#define PTE_CACHE_NUM 0
#define PMD_CACHE_NUM 1
#define PGD_CACHE_NUM 2
+#define HUGEPTE_CACHE_NUM 3
#else
#define PTE_CACHE_NUM 0
#define PMD_CACHE_NUM 1
#define PUD_CACHE_NUM 1
#define PGD_CACHE_NUM 0
+#define HUGEPTE_CACHE_NUM 2
#endif
/*
#define __NR_splice 283
#define __NR_tee 284
#define __NR_vmsplice 285
+#define __NR_openat 286
+#define __NR_mkdirat 287
+#define __NR_mknodat 288
+#define __NR_fchownat 289
+#define __NR_futimesat 290
+#ifdef __powerpc64__
+#define __NR_newfstatat 291
+#else
+#define __NR_fstatat64 291
+#endif
+#define __NR_unlinkat 292
+#define __NR_renameat 293
+#define __NR_linkat 294
+#define __NR_symlinkat 295
+#define __NR_readlinkat 296
+#define __NR_fchmodat 297
+#define __NR_faccessat 298
#ifdef __KERNEL__
-#define __NR_syscalls 286
+#define __NR_syscalls 299
#define __NR__exit __NR_exit
#define NR_syscalls __NR_syscalls
#ifdef CONFIG_PPC64
#define __ARCH_WANT_COMPAT_SYS_TIME
#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND
+#define __ARCH_WANT_SYS_NEWFSTATAT
#endif
/*
#error "need definition of ppc_sys_devices"
#endif
+#define PPC_SYS_IORESOURCE_FIXUPPED 0x00000001
+
struct ppc_sys_spec {
/* PPC sys is matched via (ID & mask) == value, id could be
* PVR, SVR, IMMR, * etc. */
#endif
/* Bit definitions for CCR1. */
+#define CCR1_DPC 0x00000100 /* Disable L1 I-Cache/D-Cache parity checking */
#define CCR1_TCS 0x00000080 /* Timer Clock Select */
/* Bit definitions for the MCSR. */
chip->mixer_data = NULL;
}
-int snd_pmac_toonie_init(struct snd_pmac *chip)
+int __init snd_pmac_toonie_init(struct snd_pmac *chip)
{
struct pmac_toonie *mix;
projects / powerpc.git / commitdiff