T: git kernel.org:/pub/scm/linux/kernel/git/lenb/linux-acpi-2.6.git
S: Maintained
+ +ACPI PCI HOTPLUG DRIVER
+ +P: Kristen Carlson Accardi
+ +M: kristen.c.accardi@intel.com
+ +L: pcihpd-discuss@lists.sourceforge.net
+ +S: Maintained
+ +
AD1816 SOUND DRIVER
P: Thorsten Knabe
M: Thorsten Knabe <linux@thorsten-knabe.de>
ALI1563 I2C DRIVER
P: Rudolf Marek
M: r.marek@sh.cvut.cz
- L: lm-sensors@lm-sensors.org
+ L: i2c@lm-sensors.org
S: Maintained
ALPHA PORT
W: http://www.amd.com/us-en/ConnectivitySolutions/TechnicalResources/0,,50_2334_2452_11363,00.html
S: Supported
+ +AOA (Apple Onboard Audio) ALSA DRIVER
+ +P: Johannes Berg
+ +M: johannes@sipsolutions.net
+ +L: linuxppc-dev@ozlabs.org
+ +L: alsa-devel@alsa-project.org
+ +S: Maintained
+ +
APM DRIVER
P: Stephen Rothwell
M: sfr@canb.auug.org.au
P: Jamie Lenehan
M: lenehan@twibble.org
W: http://twibble.org/dist/dc395x/
+ L: dc395x@twibble.org
L: http://lists.twibble.org/mailman/listinfo/dc395x/
S: Maintained
T: git http://tali.admingilde.org/git/linux-docbook.git
S: Maintained
+ ++++DOCKING STATION DRIVER
+ ++++P: Kristen Carlson Accardi
+ ++++M: kristen.c.accardi@intel.com
+ ++++L: linux-acpi@vger.kernel.org
+ ++++S: Maintained
+ ++++
DOUBLETALK DRIVER
P: James R. Van Zandt
M: jrv@vanzandt.mv.com
M: saw@saw.sw.com.sg
S: Maintained
+ +EFS FILESYSTEM
+ +W: http://aeschi.ch.eu.org/efs/
+ +S: Orphan
+ +
EMU10K1 SOUND DRIVER
P: James Courtier-Dutton
M: James@superbug.demon.co.uk
I2C SUBSYSTEM
P: Jean Delvare
M: khali@linux-fr.org
- L: lm-sensors@lm-sensors.org
+ L: i2c@lm-sensors.org
W: http://www.lm-sensors.nu/
T: quilt kernel.org/pub/linux/kernel/people/gregkh/gregkh-2.6/
S: Maintained
M: yi.zhu@intel.com
P: James Ketrenos
M: jketreno@linux.intel.com
+ L: ipw2100-devel@lists.sourceforge.net
L: http://lists.sourceforge.net/mailman/listinfo/ipw2100-devel
W: http://ipw2100.sourceforge.net
S: Supported
M: yi.zhu@intel.com
P: James Ketrenos
M: jketreno@linux.intel.com
+ L: ipw2100-devel@lists.sourceforge.net
L: http://lists.sourceforge.net/mailman/listinfo/ipw2100-devel
W: http://ipw2200.sourceforge.net
S: Supported
T: git kernel.org:/pub/scm/linux/kernel/git/shaggy/jfs-2.6.git
S: Supported
- -JOURNALLING LAYER FOR BLOCK DEVICS (JBD)
+ +JOURNALLING LAYER FOR BLOCK DEVICES (JBD)
P: Stephen Tweedie, Andrew Morton
M: sct@redhat.com, akpm@osdl.org
L: ext2-devel@lists.sourceforge.net
KERNEL JANITORS
P: Several
- -L: kernel-janitors@osdl.org
+ +L: kernel-janitors@lists.osdl.org
W: http://www.kerneljanitors.org/
- -W: http://sf.net/projects/kernel-janitor/
S: Maintained
KERNEL NFSD
S: Maintained
LAPB module
- P: Henner Eisen
- M: eis@baty.hanse.de
L: linux-x25@vger.kernel.org
- S: Maintained
+ S: Orphan
LASI 53c700 driver for PARISC
P: James E.J. Bottomley
W: http://megaraid.lsilogic.com
S: Maintained
+ +MEMORY MANAGEMENT
+ +L: linux-mm@kvack.org
+ +L: linux-kernel@vger.kernel.org
+ +W: http://www.linux-mm.org
+ +S: Maintained
+ +
MEMORY TECHNOLOGY DEVICES (MTD)
P: David Woodhouse
M: dwmw2@infradead.org
OPENCORES I2C BUS DRIVER
P: Peter Korsgaard
M: jacmet@sunsite.dk
- L: lm-sensors@lm-sensors.org
+ L: i2c@lm-sensors.org
S: Maintained
ORACLE CLUSTER FILESYSTEM 2 (OCFS2)
PCMCIA SUBSYSTEM
P: Linux PCMCIA Team
+ L: linux-pcmcia@lists.infradead.org
L: http://lists.infradead.org/mailman/listinfo/linux-pcmcia
T: git kernel.org:/pub/scm/linux/kernel/git/brodo/pcmcia-2.6.git
S: Maintained
L: netdev@vger.kernel.org
S: Maintained
+ PER-TASK DELAY ACCOUNTING
+ P: Shailabh Nagar
+ M: nagar@watson.ibm.com
+ L: linux-kernel@vger.kernel.org
+ S: Maintained
+
PERSONALITY HANDLING
P: Christoph Hellwig
M: hch@infradead.org
L: spi-devel-general@lists.sourceforge.net
S: Maintained
+ +STABLE BRANCH:
+ +P: Greg Kroah-Hartman
+ +M: greg@kroah.com
+ +P: Chris Wright
+ +M: chrisw@sous-sol.org
+ +L: stable@kernel.org
+ +S: Maintained
+ +
+++++STABLE BRANCH:
+++++P: Greg Kroah-Hartman
+++++M: greg@kroah.com
+++++P: Chris Wright
+++++M: chrisw@sous-sol.org
+++++L: stable@kernel.org
+++++S: Maintained
+++++
TPM DEVICE DRIVER
P: Kylene Hall
M: kjhall@us.ibm.com
M: hch@infradead.org
S: Maintained
+ TC CLASSIFIER
+ P: Jamal Hadi Salim
+ M: hadi@cyberus.ca
+ L: netdev@vger.kernel.org
+ S: Maintained
+
TI OMAP RANDOM NUMBER GENERATOR SUPPORT
P: Deepak Saxena
M: dsaxena@plexity.net
S: Maintained
+ TASKSTATS STATISTICS INTERFACE
+ P: Shailabh Nagar
+ M: nagar@watson.ibm.com
+ L: linux-kernel@vger.kernel.org
+ S: Maintained
+
TI PARALLEL LINK CABLE DRIVER
P: Romain Lievin
M: roms@lpg.ticalc.org
VIAPRO SMBUS DRIVER
P: Jean Delvare
M: khali@linux-fr.org
- L: lm-sensors@lm-sensors.org
+ L: i2c@lm-sensors.org
S: Maintained
UCLINUX (AND M68KNOMMU)
W1 DALLAS'S 1-WIRE BUS
P: Evgeniy Polyakov
M: johnpol@2ka.mipt.ru
+ S: Maintained
+
+ W83791D HARDWARE MONITORING DRIVER
+ P: Charles Spirakis
+ M: bezaur@gmail.com
L: lm-sensors@lm-sensors.org
S: Maintained
piix4_io_quirk(dev, "PIIX4 devres J", 0x7c, 1 << 20);
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3, quirk_piix4_acpi );
+ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443MX_3, quirk_piix4_acpi );
/*
* ICH4, ICH4-M, ICH5, ICH5-M ACPI: Three IO regions pointed to by longwords at
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C597_0, quirk_vt82c598_id );
+ #ifdef CONFIG_ACPI_SLEEP
+
+ /*
+ * Some VIA systems boot with the abnormal status flag set. This can cause
+ * the BIOS to re-POST the system on resume rather than passing control
+ * back to the OS. Clear the flag on boot
+ */
+ static void __devinit quirk_via_abnormal_poweroff(struct pci_dev *dev)
+ {
+ u32 reg;
+
+ acpi_hw_register_read(ACPI_MTX_DO_NOT_LOCK, ACPI_REGISTER_PM1_STATUS,
+ ®);
+
+ if (reg & 0x800) {
+ printk("Clearing abnormal poweroff flag\n");
+ acpi_hw_register_write(ACPI_MTX_DO_NOT_LOCK,
+ ACPI_REGISTER_PM1_STATUS,
+ (u16)0x800);
+ }
+ }
+
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, quirk_via_abnormal_poweroff);
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, quirk_via_abnormal_poweroff);
+
+ #endif
+
/*
* CardBus controllers have a legacy base address that enables them
* to respond as i82365 pcmcia controllers. We don't want them to
case 0x8070: /* P4G8X Deluxe */
asus_hides_smbus = 1;
}
+ + if (dev->device == PCI_DEVICE_ID_INTEL_E7501_MCH)
+ + switch (dev->subsystem_device) {
+ + case 0x80c9: /* PU-DLS */
+ + asus_hides_smbus = 1;
+ + }
if (dev->device == PCI_DEVICE_ID_INTEL_82855GM_HB)
switch (dev->subsystem_device) {
case 0x1751: /* M2N notebook */
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82850_HB, asus_hides_smbus_hostbridge );
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82865_HB, asus_hides_smbus_hostbridge );
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_7205_0, asus_hides_smbus_hostbridge );
+ +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7501_MCH, asus_hides_smbus_hostbridge );
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82855PM_HB, asus_hides_smbus_hostbridge );
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82855GM_HB, asus_hides_smbus_hostbridge );
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82915GM_HB, asus_hides_smbus_hostbridge );
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0, asus_hides_smbus_lpc );
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0, asus_hides_smbus_lpc );
+ +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_0, asus_hides_smbus_lpc );
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_12, asus_hides_smbus_lpc );
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12, asus_hides_smbus_lpc );
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0, asus_hides_smbus_lpc );
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_963, quirk_sis_96x_smbus );
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_LPC, quirk_sis_96x_smbus );
+ #if defined(CONFIG_SCSI_SATA) || defined(CONFIG_SCSI_SATA_MODULE)
+
+ /*
+ * If we are using libata we can drive this chip properly but must
+ * do this early on to make the additional device appear during
+ * the PCI scanning.
+ */
+
+ static void __devinit quirk_jmicron_dualfn(struct pci_dev *pdev)
+ {
+ u32 conf;
+ u8 hdr;
+
+ /* Only poke fn 0 */
+ if (PCI_FUNC(pdev->devfn))
+ return;
+
+ switch(pdev->device) {
+ case PCI_DEVICE_ID_JMICRON_JMB365:
+ case PCI_DEVICE_ID_JMICRON_JMB366:
+ /* Redirect IDE second PATA port to the right spot */
+ pci_read_config_dword(pdev, 0x80, &conf);
+ conf |= (1 << 24);
+ /* Fall through */
+ pci_write_config_dword(pdev, 0x80, conf);
+ case PCI_DEVICE_ID_JMICRON_JMB361:
+ case PCI_DEVICE_ID_JMICRON_JMB363:
+ pci_read_config_dword(pdev, 0x40, &conf);
+ /* Enable dual function mode, AHCI on fn 0, IDE fn1 */
+ /* Set the class codes correctly and then direct IDE 0 */
+ conf &= ~0x000F0200; /* Clear bit 9 and 16-19 */
+ conf |= 0x00C20002; /* Set bit 1, 17, 22, 23 */
+ pci_write_config_dword(pdev, 0x40, conf);
+
+ /* Reconfigure so that the PCI scanner discovers the
+ device is now multifunction */
+
+ pci_read_config_byte(pdev, PCI_HEADER_TYPE, &hdr);
+ pdev->hdr_type = hdr & 0x7f;
+ pdev->multifunction = !!(hdr & 0x80);
+
+ break;
+ }
+ }
+
+ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, quirk_jmicron_dualfn);
+
+ #endif
+
#ifdef CONFIG_X86_IO_APIC
static void __init quirk_alder_ioapic(struct pci_dev *pdev)
{
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PXH_1, quirk_pcie_pxh);
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PXHV, quirk_pcie_pxh);
+ /*
+ * Some Intel PCI Express chipsets have trouble with downstream
+ * device power management.
+ */
+ static void quirk_intel_pcie_pm(struct pci_dev * dev)
+ {
+ pci_pm_d3_delay = 120;
+ dev->no_d1d2 = 1;
+ }
+
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x25e2, quirk_intel_pcie_pm);
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x25e3, quirk_intel_pcie_pm);
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x25e4, quirk_intel_pcie_pm);
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x25e5, quirk_intel_pcie_pm);
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x25e6, quirk_intel_pcie_pm);
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x25e7, quirk_intel_pcie_pm);
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x25f7, quirk_intel_pcie_pm);
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x25f8, quirk_intel_pcie_pm);
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x25f9, quirk_intel_pcie_pm);
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x25fa, quirk_intel_pcie_pm);
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x2601, quirk_intel_pcie_pm);
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x2602, quirk_intel_pcie_pm);
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x2603, quirk_intel_pcie_pm);
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x2604, quirk_intel_pcie_pm);
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x2605, quirk_intel_pcie_pm);
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x2606, quirk_intel_pcie_pm);
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x2607, quirk_intel_pcie_pm);
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x2608, quirk_intel_pcie_pm);
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x2609, quirk_intel_pcie_pm);
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x260a, quirk_intel_pcie_pm);
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x260b, quirk_intel_pcie_pm);
/*
* Fixup the cardbus bridges on the IBM Dock II docking station
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NETMOS, PCI_ANY_ID, quirk_netmos);
+++++ static void __devinit quirk_e100_interrupt(struct pci_dev *dev)
+++++ {
+++++ u16 command;
+++++ u32 bar;
+++++ u8 __iomem *csr;
+++++ u8 cmd_hi;
+++++
+++++ switch (dev->device) {
+++++ /* PCI IDs taken from drivers/net/e100.c */
+++++ case 0x1029:
+++++ case 0x1030 ... 0x1034:
+++++ case 0x1038 ... 0x103E:
+++++ case 0x1050 ... 0x1057:
+++++ case 0x1059:
+++++ case 0x1064 ... 0x106B:
+++++ case 0x1091 ... 0x1095:
+++++ case 0x1209:
+++++ case 0x1229:
+++++ case 0x2449:
+++++ case 0x2459:
+++++ case 0x245D:
+++++ case 0x27DC:
+++++ break;
+++++ default:
+++++ return;
+++++ }
+++++
+++++ /*
+++++ * Some firmware hands off the e100 with interrupts enabled,
+++++ * which can cause a flood of interrupts if packets are
+++++ * received before the driver attaches to the device. So
+++++ * disable all e100 interrupts here. The driver will
+++++ * re-enable them when it's ready.
+++++ */
+++++ pci_read_config_word(dev, PCI_COMMAND, &command);
+++++ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar);
+++++
+++++ if (!(command & PCI_COMMAND_MEMORY) || !bar)
+++++ return;
+++++
+++++ csr = ioremap(bar, 8);
+++++ if (!csr) {
+++++ printk(KERN_WARNING "PCI: Can't map %s e100 registers\n",
+++++ pci_name(dev));
+++++ return;
+++++ }
+++++
+++++ cmd_hi = readb(csr + 3);
+++++ if (cmd_hi == 0) {
+++++ printk(KERN_WARNING "PCI: Firmware left %s e100 interrupts "
+++++ "enabled, disabling\n", pci_name(dev));
+++++ writeb(1, csr + 3);
+++++ }
+++++
+++++ iounmap(csr);
+++++ }
+++++ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, quirk_e100_interrupt);
static void __devinit fixup_rev1_53c810(struct pci_dev* dev)
{
projects / powerpc.git / commitdiff