Merge branch 'merge'

diff --cc arch/powerpc/Kconfig
Simple merge

diff --cc arch/powerpc/kernel/Makefile
Simple merge

diff --cc arch/powerpc/kernel/cpu_setup_ppc970.S
index f619932,0000000..6525948
mode 100644,000000..100644
--- 1/arch/powerpc/kernel/cpu_setup_ppc970.S
--- /dev/null
+++ b/arch/powerpc/kernel/cpu_setup_ppc970.S
@@@ -1,174 -1,0 +1,176 @@@
 +/*
 + * This file contains low level CPU setup functions.
 + *    Copyright (C) 2003 Benjamin Herrenschmidt (benh@kernel.crashing.org)
 + *
 + * This program is free software; you can redistribute it and/or
 + * modify it under the terms of the GNU General Public License
 + * as published by the Free Software Foundation; either version
 + * 2 of the License, or (at your option) any later version.
 + *
 + */
 +
 +#include <asm/processor.h>
 +#include <asm/page.h>
 +#include <asm/cputable.h>
 +#include <asm/ppc_asm.h>
 +#include <asm/asm-offsets.h>
 +#include <asm/cache.h>
 +
 +_GLOBAL(__cpu_preinit_ppc970)
 +      /* Do nothing if not running in HV mode */
 +      mfmsr   r0
 +      rldicl. r0,r0,4,63
 +      beqlr
 +
 +      /* Make sure HID4:rm_ci is off before MMU is turned off, that large
 +       * pages are enabled with HID4:61 and clear HID5:DCBZ_size and
 +       * HID5:DCBZ32_ill
 +       */
 +      li      r0,0
 +      mfspr   r3,SPRN_HID4
 +      rldimi  r3,r0,40,23     /* clear bit 23 (rm_ci) */
 +      rldimi  r3,r0,2,61      /* clear bit 61 (lg_pg_en) */
 +      sync
 +      mtspr   SPRN_HID4,r3
 +      isync
 +      sync
 +      mfspr   r3,SPRN_HID5
 +      rldimi  r3,r0,6,56      /* clear bits 56 & 57 (DCBZ*) */
 +      sync
 +      mtspr   SPRN_HID5,r3
 +      isync
 +      sync
 +
 +      /* Setup some basic HID1 features */
 +      mfspr   r0,SPRN_HID1
 +      li      r3,0x1200               /* enable i-fetch cacheability */
 +      sldi    r3,r3,44                /* and prefetch */
 +      or      r0,r0,r3
 +      mtspr   SPRN_HID1,r0
 +      mtspr   SPRN_HID1,r0
 +      isync
 +
 +      /* Clear HIOR */
 +      li      r0,0
 +      sync
 +      mtspr   SPRN_HIOR,0             /* Clear interrupt prefix */
 +      isync
 +      blr
 +
 +/* Definitions for the table use to save CPU states */
 +#define CS_HID0               0
 +#define CS_HID1               8
 +#define       CS_HID4         16
 +#define CS_HID5               24
 +#define CS_SIZE               32
 +
 +      .data
 +      .balign L1_CACHE_BYTES,0
 +cpu_state_storage:
 +      .space  CS_SIZE
 +      .balign L1_CACHE_BYTES,0
 +      .text
 +
 +
 +_GLOBAL(__setup_cpu_ppc970)
 +      /* Do nothing if not running in HV mode */
 +      mfmsr   r0
 +      rldicl. r0,r0,4,63
 +      beqlr
 +
 +      mfspr   r0,SPRN_HID0
 +      li      r11,5                   /* clear DOZE and SLEEP */
 +      rldimi  r0,r11,52,8             /* set NAP and DPM */
++      li      r11,0
++      rldimi  r0,r11,32,31            /* clear EN_ATTN */
 +      mtspr   SPRN_HID0,r0
 +      mfspr   r0,SPRN_HID0
 +      mfspr   r0,SPRN_HID0
 +      mfspr   r0,SPRN_HID0
 +      mfspr   r0,SPRN_HID0
 +      mfspr   r0,SPRN_HID0
 +      mfspr   r0,SPRN_HID0
 +      sync
 +      isync
 +
 +      /* Save away cpu state */
 +      LOAD_REG_IMMEDIATE(r5,cpu_state_storage)
 +
 +      /* Save HID0,1,4 and 5 */
 +      mfspr   r3,SPRN_HID0
 +      std     r3,CS_HID0(r5)
 +      mfspr   r3,SPRN_HID1
 +      std     r3,CS_HID1(r5)
 +      mfspr   r3,SPRN_HID4
 +      std     r3,CS_HID4(r5)
 +      mfspr   r3,SPRN_HID5
 +      std     r3,CS_HID5(r5)
 +
 +      blr
 +
 +/* Called with no MMU context (typically MSR:IR/DR off) to
 + * restore CPU state as backed up by the previous
 + * function. This does not include cache setting
 + */
 +_GLOBAL(__restore_cpu_ppc970)
 +      /* Do nothing if not running in HV mode */
 +      mfmsr   r0
 +      rldicl. r0,r0,4,63
 +      beqlr
 +
 +      LOAD_REG_IMMEDIATE(r5,cpu_state_storage)
 +      /* Before accessing memory, we make sure rm_ci is clear */
 +      li      r0,0
 +      mfspr   r3,SPRN_HID4
 +      rldimi  r3,r0,40,23     /* clear bit 23 (rm_ci) */
 +      sync
 +      mtspr   SPRN_HID4,r3
 +      isync
 +      sync
 +
 +      /* Clear interrupt prefix */
 +      li      r0,0
 +      sync
 +      mtspr   SPRN_HIOR,0
 +      isync
 +
 +      /* Restore HID0 */
 +      ld      r3,CS_HID0(r5)
 +      sync
 +      isync
 +      mtspr   SPRN_HID0,r3
 +      mfspr   r3,SPRN_HID0
 +      mfspr   r3,SPRN_HID0
 +      mfspr   r3,SPRN_HID0
 +      mfspr   r3,SPRN_HID0
 +      mfspr   r3,SPRN_HID0
 +      mfspr   r3,SPRN_HID0
 +      sync
 +      isync
 +
 +      /* Restore HID1 */
 +      ld      r3,CS_HID1(r5)
 +      sync
 +      isync
 +      mtspr   SPRN_HID1,r3
 +      mtspr   SPRN_HID1,r3
 +      sync
 +      isync
 +
 +      /* Restore HID4 */
 +      ld      r3,CS_HID4(r5)
 +      sync
 +      isync
 +      mtspr   SPRN_HID4,r3
 +      sync
 +      isync
 +
 +      /* Restore HID5 */
 +      ld      r3,CS_HID5(r5)
 +      sync
 +      isync
 +      mtspr   SPRN_HID5,r3
 +      sync
 +      isync
 +      blr
 +

diff --cc arch/powerpc/kernel/irq.c
Simple merge

diff --cc arch/powerpc/kernel/legacy_serial.c
index ee1e0b8,40a3929..5e6ddfa
--- 1/arch/powerpc/kernel/legacy_serial.c
--- 2/arch/powerpc/kernel/legacy_serial.c
+++ b/arch/powerpc/kernel/legacy_serial.c
@@@ -114,8 -113,9 +114,9 @@@ static int __init add_legacy_soc_port(s
                                      struct device_node *soc_dev)
  {
        u64 addr;
 -      u32 *addrp;
 +      const u32 *addrp;
        upf_t flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_SHARE_IRQ;
+       struct device_node *tsi = of_get_parent(np);
  
        /* We only support ports that have a clock frequency properly
         * encoded in the device-tree.

diff --cc arch/powerpc/kernel/machine_kexec_64.c
Simple merge

diff --cc arch/powerpc/kernel/prom_parse.c
Simple merge

diff --cc arch/powerpc/kernel/time.c
Simple merge

diff --cc arch/powerpc/platforms/85xx/mpc85xx_ads.c
Simple merge

diff --cc arch/powerpc/platforms/85xx/mpc85xx_cds.c
Simple merge

diff --cc arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
Simple merge

diff --cc arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
Simple merge

diff --cc arch/powerpc/sysdev/fsl_soc.c
Simple merge

diff --cc arch/powerpc/sysdev/tsi108_pci.c
Simple merge

diff --cc include/asm-powerpc/system.h
Simple merge