From: Russell King Date: Thu, 23 Mar 2006 16:59:37 +0000 (+0000) Subject: [ARM] Move enable_irq and disable_irq to assembler.h X-Git-Tag: v2.6.17-rc1~661^2~8 X-Git-Url: http://git.rot13.org/?a=commitdiff_plain;h=9c42954dfd50d02963cd453fb84bfef3967af2f0;p=powerpc.git [ARM] Move enable_irq and disable_irq to assembler.h 5d25ac038a317d454a4321cba955f756400835a5 broke VFP builds due to enable_irq not being defined as an assembly macro. Move it to assembler.h so everyone can use it. Signed-off-by: Russell King --- diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S index 55c99cdab7..f1c2fd5b63 100644 --- a/arch/arm/kernel/entry-header.S +++ b/arch/arm/kernel/entry-header.S @@ -37,24 +37,6 @@ #endif .endm -#if __LINUX_ARM_ARCH__ >= 6 - .macro disable_irq - cpsid i - .endm - - .macro enable_irq - cpsie i - .endm -#else - .macro disable_irq - msr cpsr_c, #PSR_I_BIT | SVC_MODE - .endm - - .macro enable_irq - msr cpsr_c, #SVC_MODE - .endm -#endif - .macro get_thread_info, rd mov \rd, sp, lsr #13 mov \rd, \rd, lsl #13 diff --git a/arch/arm/vfp/entry.S b/arch/arm/vfp/entry.S index 9ab1abfbe7..7b595547c1 100644 --- a/arch/arm/vfp/entry.S +++ b/arch/arm/vfp/entry.S @@ -18,6 +18,7 @@ #include #include #include +#include #include .globl do_vfp diff --git a/include/asm-arm/assembler.h b/include/asm-arm/assembler.h index f31ac92b6c..d53bafa9bf 100644 --- a/include/asm-arm/assembler.h +++ b/include/asm-arm/assembler.h @@ -80,16 +80,33 @@ instr regs /* - * Save the current IRQ state and disable IRQs. Note that this macro - * assumes FIQs are enabled, and that the processor is in SVC mode. + * Enable and disable interrupts */ - .macro save_and_disable_irqs, oldcpsr - mrs \oldcpsr, cpsr #if __LINUX_ARM_ARCH__ >= 6 + .macro disable_irq cpsid i + .endm + + .macro enable_irq + cpsie i + .endm #else - msr cpsr_c, #PSR_I_BIT | MODE_SVC + .macro disable_irq + msr cpsr_c, #PSR_I_BIT | SVC_MODE + .endm + + .macro enable_irq + msr cpsr_c, #SVC_MODE + .endm #endif + +/* + * Save the current IRQ state and disable IRQs. Note that this macro + * assumes FIQs are enabled, and that the processor is in SVC mode. + */ + .macro save_and_disable_irqs, oldcpsr + mrs \oldcpsr, cpsr + disable_irq .endm /*