drm/omap: fix TILER on OMAP5
authorTomi Valkeinen <tomi.valkeinen@ti.com>
Thu, 25 Sep 2014 19:24:29 +0000 (19:24 +0000)
committerTomi Valkeinen <tomi.valkeinen@ti.com>
Tue, 24 Mar 2015 11:50:55 +0000 (13:50 +0200)
commit7cb0d6c17b96b8bf3c25de2dfde4fdeb9191f4c3
tree941dfbd181591b7f3ea22a585d05e8d462b40fbf
parent2dab0bab6b749590086d44a04f9debc4fe894fd6
drm/omap: fix TILER on OMAP5

On OMAP5 it is not possible to use TILER buffer with CPU when caching or
write-combining is used. Doing so leads to errors from the memory
manager.

However, on OMAP4, write-combining works fine.

This patch adds platform specific data for the TILER, and a function
tiler_get_cpu_cache_flags() which can be used to get the caching mode to
be used.

Note that without write-combining the use of the TILER buffer with CPU
is unusably slow. It's still good to have it operational for testing
purposes.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
drivers/gpu/drm/omapdrm/omap_dmm_priv.h
drivers/gpu/drm/omapdrm/omap_dmm_tiler.c
drivers/gpu/drm/omapdrm/omap_dmm_tiler.h
drivers/gpu/drm/omapdrm/omap_gem.c