From c6ff4723ce112a6de77aacaf89e73fe4b4c7c278 Mon Sep 17 00:00:00 2001 From: "Andreas.Eversberg" Date: Tue, 13 Jul 2010 14:07:37 +0000 Subject: [PATCH] [layer 1] L1CTL_PARAM_REQ is introduced to change TX power and TA. Currently only TA (timing advance) is supported. It ranges from -128 to 128. --- include/l1a_l23_interface.h | 11 +++++++++-- src/target/firmware/include/layer1/sync.h | 2 ++ src/target/firmware/layer1/l23_api.c | 18 ++++++++++++++++++ src/target/firmware/layer1/tpu_window.c | 2 +- 4 files changed, 30 insertions(+), 3 deletions(-) diff --git a/include/l1a_l23_interface.h b/include/l1a_l23_interface.h index 88f5b59..6c47246 100644 --- a/include/l1a_l23_interface.h +++ b/include/l1a_l23_interface.h @@ -42,6 +42,7 @@ #define L1CTL_CCCH_MODE_REQ 17 #define L1CTL_CCCH_MODE_CONF 18 #define L1CTL_DM_REL_REQ 19 +#define L1CTL_PARAM_REQ 20 enum ccch_mode { CCCH_MODE_NONE = 0, @@ -112,8 +113,7 @@ struct l1ctl_info_ul { uint8_t chan_nr; /* GSM 08.58 link identifier (9.3.2) */ uint8_t link_id; - uint8_t tx_power; - uint8_t padding2; + uint8_t padding[2]; uint8_t payload[0]; } __attribute__((packed)); @@ -157,6 +157,13 @@ struct l1ctl_rach_req { uint8_t padding[1]; } __attribute__((packed)); +/* the l1_info_ul header is in front */ +struct l1ctl_par_req { + int8_t ta; + uint8_t tx_power; + uint8_t padding[2]; +} __attribute__((packed)); + struct l1ctl_dm_est_req { uint8_t tsc; uint8_t h; diff --git a/src/target/firmware/include/layer1/sync.h b/src/target/firmware/include/layer1/sync.h index 760b44c..7613449 100644 --- a/src/target/firmware/include/layer1/sync.h +++ b/src/target/firmware/include/layer1/sync.h @@ -60,6 +60,8 @@ struct l1s_state { /* The current TPU offset register */ uint32_t tpu_offset; + int8_t ta; + /* Transmit queues of pending packets for main DCCH and ACCH */ struct llist_head tx_queue[_NUM_L1S_CHAN]; diff --git a/src/target/firmware/layer1/l23_api.c b/src/target/firmware/layer1/l23_api.c index f479579..6f23337 100644 --- a/src/target/firmware/layer1/l23_api.c +++ b/src/target/firmware/layer1/l23_api.c @@ -207,9 +207,24 @@ static void l1ctl_rx_dm_rel_req(struct msgb *msg) struct l1ctl_hdr *l1h = (struct l1ctl_hdr *) msg->data; struct l1ctl_info_ul *ul = (struct l1ctl_info_ul *) l1h->data; + printd("L1CTL_DM_REL_REQ\n"); l1a_mftask_set(0); } +/* receive a L1CTL_RACH_REQ from L23 */ +static void l1ctl_rx_param_req(struct msgb *msg) +{ + struct l1ctl_hdr *l1h = (struct l1ctl_hdr *) msg->data; + struct l1ctl_info_ul *ul = (struct l1ctl_info_ul *) l1h->data; + struct l1ctl_par_req *par_req = (struct l1ctl_par_req *) ul->payload; + + printd("L1CTL_PARAM_REQ (ta=%d, tx_power=%d)\n", par_req->ta, + par_req->tx_power); + + l1s.ta = par_req->ta; + // FIXME: set power +} + /* receive a L1CTL_RACH_REQ from L23 */ static void l1ctl_rx_rach_req(struct msgb *msg) { @@ -370,6 +385,9 @@ static void l1a_l23_rx_cb(uint8_t dlci, struct msgb *msg) case L1CTL_DM_REL_REQ: l1ctl_rx_dm_rel_req(msg); break; + case L1CTL_PARAM_REQ: + l1ctl_rx_param_req(msg); + break; case L1CTL_RACH_REQ: l1ctl_rx_rach_req(msg); break; diff --git a/src/target/firmware/layer1/tpu_window.c b/src/target/firmware/layer1/tpu_window.c index ef195ca..32cbdb8 100644 --- a/src/target/firmware/layer1/tpu_window.c +++ b/src/target/firmware/layer1/tpu_window.c @@ -107,7 +107,7 @@ void l1s_tx_win_ctrl(uint16_t arfcn, enum l1_txwin_type wtype, uint8_t pwr, uint uint16_t offset = (L1_BURST_LENGTH_Q * 3) + 28; /* Alignement */ - tpu_enq_offset( (5000 + l1s.tpu_offset + (L1_BURST_LENGTH_Q * tn)) % 5000 ); + tpu_enq_offset( (5000 + l1s.tpu_offset - (l1s.ta << 2) + (L1_BURST_LENGTH_Q * tn)) % 5000 ); tpu_enq_at(5000 - 10 - (L1_BURST_LENGTH_Q * tn)); #ifdef CONFIG_TX_ENABLE -- 2.20.1