kernel/linux/arch/arm/mach-integrator/core.c

   1 /*
   2  *  linux/arch/arm/mach-integrator/core.c
   3  *
   4  *  Copyright (C) 2000-2003 Deep Blue Solutions Ltd
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2, as
   8  * published by the Free Software Foundation.
   9  */
  10 #include <linux/types.h>
  11 #include <linux/kernel.h>
  12 #include <linux/init.h>
  13 #include <linux/device.h>
  14 #include <linux/spinlock.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/sched.h>
  17
  18 #include <asm/hardware.h>
  19 #include <asm/irq.h>
  20 #include <asm/io.h>
  21 #include <asm/hardware/amba.h>
  22 #include <asm/arch/cm.h>
  23 #include <asm/system.h>
  24 #include <asm/leds.h>
  25 #include <asm/mach/time.h>
  26
  27 static struct amba_device rtc_device = {
  28         .dev            = {
  29                 .bus_id = "mb:15",
  30         },
  31         .res            = {
  32                 .start  = INTEGRATOR_RTC_BASE,
  33                 .end    = INTEGRATOR_RTC_BASE + SZ_4K - 1,
  34                 .flags  = IORESOURCE_MEM,
  35         },
  36         .irq            = { IRQ_RTCINT, NO_IRQ },
  37         .periphid       = 0x00041030,
  38 };
  39
  40 static struct amba_device uart0_device = {
  41         .dev            = {
  42                 .bus_id = "mb:16",
  43         },
  44         .res            = {
  45                 .start  = INTEGRATOR_UART0_BASE,
  46                 .end    = INTEGRATOR_UART0_BASE + SZ_4K - 1,
  47                 .flags  = IORESOURCE_MEM,
  48         },
  49         .irq            = { IRQ_UARTINT0, NO_IRQ },
  50         .periphid       = 0x0041010,
  51 };
  52
  53 static struct amba_device uart1_device = {
  54         .dev            = {
  55                 .bus_id = "mb:17",
  56         },
  57         .res            = {
  58                 .start  = INTEGRATOR_UART1_BASE,
  59                 .end    = INTEGRATOR_UART1_BASE + SZ_4K - 1,
  60                 .flags  = IORESOURCE_MEM,
  61         },
  62         .irq            = { IRQ_UARTINT1, NO_IRQ },
  63         .periphid       = 0x0041010,
  64 };
  65
  66 static struct amba_device kmi0_device = {
  67         .dev            = {
  68                 .bus_id = "mb:18",
  69         },
  70         .res            = {
  71                 .start  = KMI0_BASE,
  72                 .end    = KMI0_BASE + SZ_4K - 1,
  73                 .flags  = IORESOURCE_MEM,
  74         },
  75         .irq            = { IRQ_KMIINT0, NO_IRQ },
  76         .periphid       = 0x00041050,
  77 };
  78
  79 static struct amba_device kmi1_device = {
  80         .dev            = {
  81                 .bus_id = "mb:19",
  82         },
  83         .res            = {
  84                 .start  = KMI1_BASE,
  85                 .end    = KMI1_BASE + SZ_4K - 1,
  86                 .flags  = IORESOURCE_MEM,
  87         },
  88         .irq            = { IRQ_KMIINT1, NO_IRQ },
  89         .periphid       = 0x00041050,
  90 };
  91
  92 static struct amba_device *amba_devs[] __initdata = {
  93         &rtc_device,
  94         &uart0_device,
  95         &uart1_device,
  96         &kmi0_device,
  97         &kmi1_device,
  98 };
  99
 100 static int __init integrator_init(void)
 101 {
 102         int i;
 103
 104         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
 105                 struct amba_device *d = amba_devs[i];
 106                 amba_device_register(d, &iomem_resource);
 107         }
 108
 109         return 0;
 110 }
 111
 112 arch_initcall(integrator_init);
 113
 114 #define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_CTRL_OFFSET
 115
 116 static spinlock_t cm_lock = SPIN_LOCK_UNLOCKED;
 117
 118 /**
 119  * cm_control - update the CM_CTRL register.
 120  * @mask: bits to change
 121  * @set: bits to set
 122  */
 123 void cm_control(u32 mask, u32 set)
 124 {
 125         unsigned long flags;
 126         u32 val;
 127
 128         spin_lock_irqsave(&cm_lock, flags);
 129         val = readl(CM_CTRL) & ~mask;
 130         writel(val | set, CM_CTRL);
 131         spin_unlock_irqrestore(&cm_lock, flags);
 132 }
 133
 134 EXPORT_SYMBOL(cm_control);
 135
 136 /*
 137  * Where is the timer (VA)?
 138  */
 139 #define TIMER0_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000000)
 140 #define TIMER1_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000100)
 141 #define TIMER2_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000200)
 142 #define VA_IC_BASE     IO_ADDRESS(INTEGRATOR_IC_BASE)
 143
 144 /*
 145  * How long is the timer interval?
 146  */
 147 #define TIMER_INTERVAL  (TICKS_PER_uSEC * mSEC_10)
 148 #if TIMER_INTERVAL >= 0x100000
 149 #define TICKS2USECS(x)  (256 * (x) / TICKS_PER_uSEC)
 150 #elif TIMER_INTERVAL >= 0x10000
 151 #define TICKS2USECS(x)  (16 * (x) / TICKS_PER_uSEC)
 152 #else
 153 #define TICKS2USECS(x)  ((x) / TICKS_PER_uSEC)
 154 #endif
 155
 156 /*
 157  * What does it look like?
 158  */
 159 typedef struct TimerStruct {
 160         unsigned long TimerLoad;
 161         unsigned long TimerValue;
 162         unsigned long TimerControl;
 163         unsigned long TimerClear;
 164 } TimerStruct_t;
 165
 166 extern unsigned long (*gettimeoffset)(void);
 167
 168 static unsigned long timer_reload;
 169
 170 /*
 171  * Returns number of ms since last clock interrupt.  Note that interrupts
 172  * will have been disabled by do_gettimeoffset()
 173  */
 174 static unsigned long integrator_gettimeoffset(void)
 175 {
 176         volatile TimerStruct_t *timer1 = (TimerStruct_t *)TIMER1_VA_BASE;
 177         unsigned long ticks1, ticks2, status;
 178
 179         /*
 180          * Get the current number of ticks.  Note that there is a race
 181          * condition between us reading the timer and checking for
 182          * an interrupt.  We get around this by ensuring that the
 183          * counter has not reloaded between our two reads.
 184          */
 185         ticks2 = timer1->TimerValue & 0xffff;
 186         do {
 187                 ticks1 = ticks2;
 188                 status = __raw_readl(VA_IC_BASE + IRQ_RAW_STATUS);
 189                 ticks2 = timer1->TimerValue & 0xffff;
 190         } while (ticks2 > ticks1);
 191
 192         /*
 193          * Number of ticks since last interrupt.
 194          */
 195         ticks1 = timer_reload - ticks2;
 196
 197         /*
 198          * Interrupt pending?  If so, we've reloaded once already.
 199          */
 200         if (status & (1 << IRQ_TIMERINT1))
 201                 ticks1 += timer_reload;
 202
 203         /*
 204          * Convert the ticks to usecs
 205          */
 206         return TICKS2USECS(ticks1);
 207 }
 208
 209 /*
 210  * IRQ handler for the timer
 211  */
 212 static irqreturn_t
 213 integrator_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 214 {
 215         volatile TimerStruct_t *timer1 = (volatile TimerStruct_t *)TIMER1_VA_BASE;
 216
 217         // ...clear the interrupt
 218         timer1->TimerClear = 1;
 219
 220         timer_tick(regs);
 221
 222         return IRQ_HANDLED;
 223 }
 224
 225 static struct irqaction integrator_timer_irq = {
 226         .name           = "Integrator Timer Tick",
 227         .flags          = SA_INTERRUPT,
 228         .handler        = integrator_timer_interrupt
 229 };
 230
 231 /*
 232  * Set up timer interrupt, and return the current time in seconds.
 233  */
 234 void __init integrator_time_init(unsigned long reload, unsigned int ctrl)
 235 {
 236         volatile TimerStruct_t *timer0 = (volatile TimerStruct_t *)TIMER0_VA_BASE;
 237         volatile TimerStruct_t *timer1 = (volatile TimerStruct_t *)TIMER1_VA_BASE;
 238         volatile TimerStruct_t *timer2 = (volatile TimerStruct_t *)TIMER2_VA_BASE;
 239         unsigned int timer_ctrl = 0x80 | 0x40;  /* periodic */
 240
 241         timer_reload = reload;
 242         timer_ctrl |= ctrl;
 243
 244         if (timer_reload > 0x100000) {
 245                 timer_reload >>= 8;
 246                 timer_ctrl |= 0x08; /* /256 */
 247         } else if (timer_reload > 0x010000) {
 248                 timer_reload >>= 4;
 249                 timer_ctrl |= 0x04; /* /16 */
 250         }
 251
 252         /*
 253          * Initialise to a known state (all timers off)
 254          */
 255         timer0->TimerControl = 0;
 256         timer1->TimerControl = 0;
 257         timer2->TimerControl = 0;
 258
 259         timer1->TimerLoad    = timer_reload;
 260         timer1->TimerValue   = timer_reload;
 261         timer1->TimerControl = timer_ctrl;
 262
 263         /*
 264          * Make irqs happen for the system timer
 265          */
 266         setup_irq(IRQ_TIMERINT1, &integrator_timer_irq);
 267         gettimeoffset = integrator_gettimeoffset;
 268 }