http://www.usr.com/support/gpl/USR9107_release1.1.tar.gz
[bcm963xx.git] / kernel / linux / arch / sh / boards / cqreek / setup.c
1 /* $Id: setup.c,v 1.5 2003/08/04 01:51:58 lethal Exp $
2  *
3  * arch/sh/kernel/setup_cqreek.c
4  *
5  * Copyright (C) 2000  Niibe Yutaka
6  *
7  * CqREEK IDE/ISA Bridge Support.
8  *
9  */
10
11 #include <linux/config.h>
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/irq.h>
15
16 #include <asm/mach/cqreek.h>
17 #include <asm/machvec.h>
18 #include <asm/io.h>
19 #include <asm/io_generic.h>
20 #include <asm/irq.h>
21 #include <asm/rtc.h>
22
23 #define IDE_OFFSET 0xA4000000UL
24 #define ISA_OFFSET 0xA4A00000UL
25
26 const char *get_system_type(void)
27 {
28         return "CqREEK";
29 }
30
31 static unsigned long cqreek_port2addr(unsigned long port)
32 {
33         if (0x0000<=port && port<=0x0040)
34                 return IDE_OFFSET + port;
35         if ((0x01f0<=port && port<=0x01f7) || port == 0x03f6)
36                 return IDE_OFFSET + port;
37
38         return ISA_OFFSET + port;
39 }
40
41 /*
42  * The Machine Vector
43  */
44 struct sh_machine_vector mv_cqreek __initmv = {
45 #if defined(CONFIG_CPU_SH4)
46         .mv_nr_irqs             = 48,
47 #elif defined(CONFIG_CPU_SUBTYPE_SH7708)
48         .mv_nr_irqs             = 32,
49 #elif defined(CONFIG_CPU_SUBTYPE_SH7709)
50         .mv_nr_irqs             = 61,
51 #endif
52
53         .mv_init_irq            = init_cqreek_IRQ,
54
55         .mv_isa_port2addr       = cqreek_port2addr,
56 };
57 ALIAS_MV(cqreek)
58
59 /*
60  * Initialize the board
61  */
62 void __init platform_setup(void)
63 {
64         int i;
65 /* udelay is not available at setup time yet... */
66 #define DELAY() do {for (i=0; i<10000; i++) ctrl_inw(0xa0000000);} while(0)
67
68         if ((inw (BRIDGE_FEATURE) & 1)) { /* We have IDE interface */
69                 outw_p(0, BRIDGE_IDE_INTR_LVL);
70                 outw_p(0, BRIDGE_IDE_INTR_MASK);
71
72                 outw_p(0, BRIDGE_IDE_CTRL);
73                 DELAY();
74
75                 outw_p(0x8000, BRIDGE_IDE_CTRL);
76                 DELAY();
77
78                 outw_p(0xffff, BRIDGE_IDE_INTR_STAT); /* Clear interrupt status */
79                 outw_p(0x0f-14, BRIDGE_IDE_INTR_LVL); /* Use 14 IPR */
80                 outw_p(1, BRIDGE_IDE_INTR_MASK); /* Enable interrupt */
81                 cqreek_has_ide=1;
82         }
83
84         if ((inw (BRIDGE_FEATURE) & 2)) { /* We have ISA interface */
85                 outw_p(0, BRIDGE_ISA_INTR_LVL);
86                 outw_p(0, BRIDGE_ISA_INTR_MASK);
87
88                 outw_p(0, BRIDGE_ISA_CTRL);
89                 DELAY();
90                 outw_p(0x8000, BRIDGE_ISA_CTRL);
91                 DELAY();
92
93                 outw_p(0xffff, BRIDGE_ISA_INTR_STAT); /* Clear interrupt status */
94                 outw_p(0x0f-10, BRIDGE_ISA_INTR_LVL); /* Use 10 IPR */
95                 outw_p(0xfff8, BRIDGE_ISA_INTR_MASK); /* Enable interrupt */
96                 cqreek_has_isa=1;
97         }
98
99         printk(KERN_INFO "CqREEK Setup (IDE=%d, ISA=%d)...done\n", cqreek_has_ide, cqreek_has_isa);
100 }
101