#include "bcmtypes.h"
#define PERF_BASE 0xfffe0000
+#define TIMR_BASE 0xfffe0200
#define UART_BASE 0xfffe0300
#define GPIO_BASE 0xfffe0400
#define MPI_BASE 0xfffe2000 /* MPI control registers */
uint32 RevID;
uint16 testControl;
uint16 blkEnables;
+#define EMAC_CLK_EN 0x0010
+#define SAR_CLK_EN 0x0020
+#define USBS_CLK_EN 0x0040
#define USBH_CLK_EN 0x0100
uint32 pll_control;
#define PERF ((volatile PerfControl * const) PERF_BASE)
+typedef struct Timer {
+ uint16 unused0;
+ byte TimerMask;
+#define TIMER0EN 0x01
+#define TIMER1EN 0x02
+#define TIMER2EN 0x04
+ byte TimerInts;
+#define TIMER0 0x01
+#define TIMER1 0x02
+#define TIMER2 0x04
+#define WATCHDOG 0x08
+ uint32 TimerCtl0;
+ uint32 TimerCtl1;
+ uint32 TimerCtl2;
+#define TIMERENABLE 0x80000000
+#define RSTCNTCLR 0x40000000
+ uint32 TimerCnt0;
+ uint32 TimerCnt1;
+ uint32 TimerCnt2;
+ uint32 WatchDogDefCount;
+
+ /* Write 0xff00 0x00ff to Start timer
+ * Write 0xee00 0x00ee to Stop and re-load default count
+ * Read from this register returns current watch dog count
+ */
+ uint32 WatchDogCtl;
+
+ /* Number of 40-MHz ticks for WD Reset pulse to last */
+ uint32 WDResetCount;
+} Timer;
+
+#define TIMER ((volatile Timer * const) TIMR_BASE)
+
typedef struct UartChannel {
byte unused0;
byte control;