www.usr.com/support/gpl/USR9113_release1.0.tar.gz

[bcm963xx.git] / kernel / linux / include / asm-mips / mipsregs.h

diff --git a/kernel/linux/include/asm-mips/mipsregs.h b/kernel/linux/include/asm-mips/mipsregs.h
index 7119877..1b297d4 100755 (executable)
--- a/kernel/linux/include/asm-mips/mipsregs.h
+++ b/kernel/linux/include/asm-mips/mipsregs.h
@@ -747,9 +747,11 @@ do {                                                                       \
 
 #define read_c0_status()       __read_32bit_c0_register($12, 0)
 #define write_c0_status(val)   __write_32bit_c0_register($12, 0, val)
+#define read_c0_status_sel(sel)        __read_32bit_c0_register($12, sel)
 
 #define read_c0_cause()                __read_32bit_c0_register($13, 0)
 #define write_c0_cause(val)    __write_32bit_c0_register($13, 0, val)
+#define read_c0_cause_sel(sel) __read_32bit_c0_register($13, sel)
 
 #define read_c0_epc()          __read_ulong_c0_register($14, 0)
 #define write_c0_epc(val)      __write_ulong_c0_register($14, 0, val)
@@ -859,6 +861,9 @@ do {                                                                        \
 #define read_c0_errorepc()     __read_ulong_c0_register($30, 0)
 #define write_c0_errorepc(val) __write_ulong_c0_register($30, 0, val)
 
+#define read_c0_desave()       __read_ulong_c0_register($31, 0)
+#define write_c0_desave(val)   __write_ulong_c0_register($31, 0, val)
+
 /*
  * Macros to access the floating point coprocessor control registers
  */