version 4.2.0

[fx2fw-sdcc] / fx2 / delay.c

diff --git a/fx2/delay.c b/fx2/delay.c
index 621363a..161fb66 100644 (file)
--- a/fx2/delay.c
+++ b/fx2/delay.c
@@ -1,148 +1,74 @@
 /* -*- c++ -*- */\r
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 /*-----------------------------------------------------------------------------\r
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  * Delay routines\r
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  *-----------------------------------------------------------------------------\r
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  * Code taken from USRP2 firmware (GNU Radio Project), version 3.0.2,\r
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  * Copyright 2003 Free Software Foundation, Inc.\r
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  *-----------------------------------------------------------------------------\r
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  * This code is part of usbjtag. usbjtag is free software; you can redistribute\r
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  * it and/or modify it under the terms of the GNU General Public License as\r
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  * published by the Free Software Foundation; either version 2 of the License,\r
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  * or (at your option) any later version. usbjtag is distributed in the hope\r
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  * that it will be useful, but WITHOUT ANY WARRANTY; without even the implied\r
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  * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
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  * GNU General Public License for more details.  You should have received a\r
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  * copy of the GNU General Public License along with this program in the file\r
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  * COPYING; if not, write to the Free Software Foundation, Inc., 51 Franklin\r
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  * St, Fifth Floor, Boston, MA  02110-1301  USA\r
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  *-----------------------------------------------------------------------------\r
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  */\r
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 /*\r
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  * Delay approximately 1 microsecond (including overhead in udelay).\r
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  */\r
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 static void\r
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 udelay1 (void) _naked\r
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 {\r
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   _asm                         ; lcall that got us here took 4 bus cycles\r
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        ret                     ; 4 bus cycles\r
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   _endasm;\r
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 }\r
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 /*\r
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  * delay for approximately usecs microseconds\r
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  */\r
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 void\r
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 udelay (unsigned char usecs)\r
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 {\r
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   do {\r
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     udelay1 ();\r
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   } while (--usecs != 0);\r
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 }\r
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 /*\r
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  * Delay approximately 1 millisecond.\r
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  * We're running at 48 MHz, so we need 48,000 clock cycles.\r
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  *\r
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  * Note however, that each bus cycle takes 4 clock cycles (not obvious,\r
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  * but explains the factor of 4 problem below).\r
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  */\r
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 static void\r
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 mdelay1 (void) _naked\r
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 {\r
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   _asm\r
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        mov     dptr,#(-1200 & 0xffff)\r
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 002$:  \r
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        inc     dptr            ; 3 bus cycles\r
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        mov     a, dpl          ; 2 bus cycles\r
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        orl     a, dph          ; 2 bus cycles\r
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        jnz     002$            ; 3 bus cycles\r
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        ret\r
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   _endasm;\r
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 }\r
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 void\r
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 mdelay (unsigned int msecs)\r
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 {\r
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   do {\r
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     mdelay1 ();\r
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   } while (--msecs != 0);\r
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 }\r
 \r
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        \r
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