/*-----------------------------------------------------------------------------\r
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*\r
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* Hardware-dependent code for usb_jtag\r
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*-----------------------------------------------------------------------------\r
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* Copyright (C) 2007 Kolja Waschk, ixo.de\r
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*-----------------------------------------------------------------------------\r
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* This code is part of usbjtag. usbjtag is free software; you can redistribute\r
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* it and/or modify it under the terms of the GNU General Public License as\r
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* published by the Free Software Foundation; either version 2 of the License,\r
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* or (at your option) any later version. usbjtag is distributed in the hope\r
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* that it will be useful, but WITHOUT ANY WARRANTY; without even the implied\r
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* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
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* GNU General Public License for more details. You should have received a\r
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* copy of the GNU General Public License along with this program in the file\r
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* COPYING; if not, write to the Free Software Foundation, Inc., 51 Franklin\r
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* St, Fifth Floor, Boston, MA 02110-1301 USA\r
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*-----------------------------------------------------------------------------\r
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*/\r
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#include "hardware.h"\r
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#include "fx2regs.h"\r
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#include "syncdelay.h"\r
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//---------------------------------------------------------------------------\r
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#define SetTCK(x) do{if(x) IOE|=0x08; else IOE&=~0x08; }while(0)\r
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#define SetTMS(x) do{if(x) IOE|=0x10; else IOE&=~0x10; }while(0)\r
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#define SetTDI(x) do{if(x) IOE|=0x40; else IOE&=~0x40; }while(0)\r
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#define GetTDO() ((IOE>>5)&1)\r
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/* XPCU has neither AS nor PS mode pins */\r
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#define HAVE_OE_LED 1\r
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/* +0=green led, +1=red led */\r
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sbit at 0x80+1 OELED;\r
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#define SetOELED(x) do{OELED=(x);}while(0)\r
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//-----------------------------------------------------------------------------\r
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void ProgIO_Poll(void) {}\r
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void ProgIO_Enable(void) {}\r
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void ProgIO_Disable(void) {}\r
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void ProgIO_Deinit(void) {}\r
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void ProgIO_Init(void)\r
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{\r
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/* The following code depends on your actual circuit design.\r
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Make required changes _before_ you try the code! */\r
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// set the CPU clock to 48MHz, enable clock output to FPGA\r
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CPUCS = bmCLKOE | bmCLKSPD1;\r
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// Use internal 48 MHz, enable output, use "Port" mode for all pins\r
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IFCONFIG = bmIFCLKSRC | bm3048MHZ | bmIFCLKOE;\r
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GPIFABORT = 0xFF;\r
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PORTACFG = 0x00; OEA = 0x03; IOA=0x01;\r
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PORTCCFG = 0x00; OEC = 0x00; IOC=0x00;\r
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PORTECFG = 0x00; OEE = 0x58; IOE=0x00;\r
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}\r
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void ProgIO_Set_State(unsigned char d)\r
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{\r
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- /* Set state of output pins:\r
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+ /* Set state of output pins\r
+ * (d is the byte from the host):\r
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* d.0 => TCK\r
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* d.1 => TMS\r
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* d.2 => nCE (only #ifdef HAVE_AS_MODE)\r
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* d.3 => nCS (only #ifdef HAVE_AS_MODE)\r
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* d.4 => TDI\r
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* d.6 => LED / Output Enable\r
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*/\r
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SetTCK((d & bmBIT0) ? 1 : 0);\r
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SetTMS((d & bmBIT1) ? 1 : 0);\r
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SetTDI((d & bmBIT4) ? 1 : 0);\r
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#ifdef HAVE_OE_LED\r
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SetOELED((d & bmBIT5) ? 1 : 0);\r
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#endif\r
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}\r
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unsigned char ProgIO_Set_Get_State(unsigned char d)\r
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{\r
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- /* Read state of input pins:\r
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+ /* Set state of output pins (s.a.)\r
+ * then read state of input pins:\r
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* TDO => d.0\r
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* DATAOUT => d.1 (only #ifdef HAVE_AS_MODE)\r
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*/\r
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ProgIO_Set_State(d);\r
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- return 2|GetTDO();\r
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+ return 2|GetTDO(); /* DATAOUT assumed high, no AS mode */\r
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void ProgIO_ShiftOut(unsigned char c)\r
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{\r
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/* Shift out byte C:\r
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*\r
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* 8x {\r
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* Output least significant bit on TDI\r
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* Raise TCK\r
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* Shift c right\r
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* Lower TCK\r
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* }\r
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*/\r
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unsigned char lc=c;\r
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if(lc&1) IOE|=0x40; else IOE&=~0x40; IOE|=0x08; lc>>=1; IOE&=~0x08;\r
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if(lc&1) IOE|=0x40; else IOE&=~0x40; IOE|=0x08; lc>>=1; IOE&=~0x08;\r
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if(lc&1) IOE|=0x40; else IOE&=~0x40; IOE|=0x08; lc>>=1; IOE&=~0x08;\r
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if(lc&1) IOE|=0x40; else IOE&=~0x40; IOE|=0x08; lc>>=1; IOE&=~0x08;\r
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if(lc&1) IOE|=0x40; else IOE&=~0x40; IOE|=0x08; lc>>=1; IOE&=~0x08;\r
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if(lc&1) IOE|=0x40; else IOE&=~0x40; IOE|=0x08; lc>>=1; IOE&=~0x08;\r
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if(lc&1) IOE|=0x40; else IOE&=~0x40; IOE|=0x08; lc>>=1; IOE&=~0x08;\r
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if(lc&1) IOE|=0x40; else IOE&=~0x40; IOE|=0x08; lc>>=1; IOE&=~0x08;\r
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}\r
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unsigned char ProgIO_ShiftInOut(unsigned char c)\r
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{\r
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/* Shift out byte C, shift in from TDO:\r
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*\r
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* 8x {\r
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* Read carry from TDO\r
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* Output least significant bit on TDI\r
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* Raise TCK\r
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- * Shift c right, append carry (TDO) at left\r
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+ * Shift c right, append carry (TDO) at left (into MSB)\r
* Lower TCK\r
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* }\r
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* Return c.\r
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*/\r
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unsigned char carry;\r
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unsigned char lc=c;\r
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carry = (IOE&0x20)<<2; if(lc&1) IOE|=0x40; else IOE&=~0x40; IOE|=0x08; lc=carry|(lc>>1); IOE&=~0x08;\r
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carry = (IOE&0x20)<<2; if(lc&1) IOE|=0x40; else IOE&=~0x40; IOE|=0x08; lc=carry|(lc>>1); IOE&=~0x08;\r
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carry = (IOE&0x20)<<2; if(lc&1) IOE|=0x40; else IOE&=~0x40; IOE|=0x08; lc=carry|(lc>>1); IOE&=~0x08;\r
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carry = (IOE&0x20)<<2; if(lc&1) IOE|=0x40; else IOE&=~0x40; IOE|=0x08; lc=carry|(lc>>1); IOE&=~0x08;\r
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carry = (IOE&0x20)<<2; if(lc&1) IOE|=0x40; else IOE&=~0x40; IOE|=0x08; lc=carry|(lc>>1); IOE&=~0x08;\r
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carry = (IOE&0x20)<<2; if(lc&1) IOE|=0x40; else IOE&=~0x40; IOE|=0x08; lc=carry|(lc>>1); IOE&=~0x08;\r
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carry = (IOE&0x20)<<2; if(lc&1) IOE|=0x40; else IOE&=~0x40; IOE|=0x08; lc=carry|(lc>>1); IOE&=~0x08;\r
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carry = (IOE&0x20)<<2; if(lc&1) IOE|=0x40; else IOE&=~0x40; IOE|=0x08; lc=carry|(lc>>1); IOE&=~0x08;\r
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return lc;\r
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}\r
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