2 \author Travis Goodspeed
3 \brief Chipcon 8051 debugging.
7 //This is like SPI, except that you read or write, not both.
9 /* N.B. The READ verb performs a write of all (any) supplied data,
10 then reads a single byte reply from the target. The WRITE verb
23 /* Concerning clock rates,
24 the maximimum clock rates are defined on page 4 of the spec.
25 They vary, but are roughly 30MHz. Raising this clock rate might
26 allow for clock glitching, but the GoodFET isn't sufficient fast for that.
27 Perhaps a 200MHz ARM or an FPGA in the BadassFET?
31 //MISO and MOSI are the same pin, direction changes.
37 //This could be more accurate.
38 //Does it ever need to be?
40 #define CCDELAY(x) delay(x)
42 #define SETMOSI P5OUT|=MOSI
43 #define CLRMOSI P5OUT&=~MOSI
44 #define SETCLK P5OUT|=SCK
45 #define CLRCLK P5OUT&=~SCK
46 #define READMISO (P5IN&MISO?1:0)
48 #define CCWRITE P5DIR|=MOSI
49 #define CCREAD P5DIR&=~MISO
51 //! Set up the pins for CC mode. Does not init debugger.
55 //P5DIR&=~MISO; //MOSI is MISO
58 //! Initialize the debugger
60 //Two positive debug clock pulses while !RST is low.
61 //Take RST low, pulse twice, then high.
79 //! Read and write a CC bit.
80 unsigned char cctrans8(unsigned char byte){
82 //This function came from the SPI Wikipedia article.
85 for (bit = 0; bit < 8; bit++) {
86 /* write MOSI on trailing edge of previous clock */
93 /* half a clock cycle before leading/rising edge */
97 /* half a clock cycle before trailing/falling edge */
100 /* read MISO on trailing edge */
108 //! Send a command from txbytes.
109 void cccmd(unsigned char len){
113 cctrans8(cmddata[i]);
116 //! Fetch a reply, usually 1 byte.
117 void ccread(unsigned char len){
121 cmddata[i]=cctrans8(0);
124 //! Handles a monitor command.
125 void cchandle(unsigned char app,
128 //Always init. Might help with buggy lines.
132 //CC_PEEK and CC_POKE will come later.
133 case READ: //Write a command and return 1-byte reply.
138 case WRITE: //Write a command with no reply.
142 case START://enter debugger
146 case STOP://exit debugger
147 //Take RST low, then high.
164 cc_wr_config(cmddata[0]);
179 case CC_SET_HW_BRKPNT:
180 cc_set_hw_brkpnt(cmddataword[0]);
199 case CC_STEP_REPLACE:
200 txdata(app,NOK,0);//TODO add me
209 case CC_READ_CODE_MEMORY:
210 cmddata[0]=cc_peekcodebyte(cmddataword[0]);
213 case CC_READ_XDATA_MEMORY:
214 cmddata[0]=cc_peekdatabyte(cmddataword[0]);
217 case CC_WRITE_XDATA_MEMORY:
218 cmddata[0]=cc_pokedatabyte(cmddataword[0], cmddata[2]);
223 case CC_WRITE_FLASH_PAGE:
224 case CC_MASS_ERASE_FLASH:
225 case CC_PROGRAM_FLASH:
226 txdata(app,NOK,0);//TODO implement me.
231 //! Erase all of a Chipcon's memory.
232 void cc_chip_erase(){
233 cmddata[0]=CCCMD_CHIP_ERASE; //0x14
237 //! Write the configuration byte.
238 void cc_wr_config(unsigned char config){
239 cmddata[0]=CCCMD_WR_CONFIG; //0x1D
244 //! Read the configuration byte.
245 unsigned char cc_rd_config(){
246 cmddata[0]=CCCMD_RD_CONFIG; //0x24
253 //! Read the status register
254 unsigned char cc_read_status(){
255 cmddata[0]=CCCMD_READ_STATUS; //0x3f
261 //! Read the CHIP ID bytes.
262 unsigned short cc_get_chip_id(){
263 unsigned short toret;
264 cmddata[0]=CCCMD_GET_CHIP_ID; //0x68
270 toret=(toret<<8)+cmddata[1];
276 unsigned short cc_get_pc(){
277 cmddata[0]=CCCMD_GET_PC; //0x28
282 return cmddataword[0];
285 //! Set a hardware breakpoint.
286 void cc_set_hw_brkpnt(unsigned short adr){
287 debugstr("FIXME: This certainly won't work.");
297 cmddata[0]=CCCMD_HALT; //0x44
304 cmddata[0]=CCCMD_RESUME; //0x4C
311 //! Step an instruction
312 void cc_step_instr(){
313 cmddata[0]=CCCMD_STEP_INSTR; //0x5C
319 //! Debug an instruction.
320 void cc_debug_instr(unsigned char len){
321 //Bottom two bits of command indicate length.
322 unsigned char cmd=CCCMD_DEBUG_INSTR+(len&0x3); //0x54+len
324 cctrans8(cmd); //Second command code
325 cccmd(len&0x3); //Command itself.
330 //! Debug an instruction, for local use.
331 unsigned char cc_debug(unsigned char len,
335 unsigned char cmd=CCCMD_DEBUG_INSTR+(len&0x3);//0x54+len
345 return cctrans8(0x00);
348 //! Fetch a byte of code memory.
349 unsigned char cc_peekcodebyte(unsigned long adr){
350 /** See page 9 of SWRA124 */
351 unsigned char bank=adr>>15,
357 //MOV MEMCTR, (bank*16)+1
358 cc_debug(3, 0x75, 0xC7, (bank<<4) + 1);
360 cc_debug(3, 0x90, hb, lb);
364 cc_debug(2, 0xE4, 0, 0);
366 toret=cc_debug(3, 0x93, 0, 0);
368 //cc_debug(1, 0xA3, 0, 0);
374 //! Set a byte of data memory.
375 unsigned char cc_pokedatabyte(unsigned int adr,
382 cc_debug(3, 0x90, hb, lb);
384 cc_debug(2, 0x74, val, 0);
386 cc_debug(1, 0xF0, 0, 0);
390 DEBUG_INSTR(IN: 0x90, HIBYTE(address), LOBYTE(address), OUT: Discard);
391 for (n = 0; n < count; n++) {
392 DEBUG_INSTR(IN: 0x74, inputArray[n], OUT: Discard);
393 DEBUG_INSTR(IN: 0xF0, OUT: Discard);
394 DEBUG_INSTR(IN: 0xA3, OUT: Discard);
399 //! Fetch a byte of data memory.
400 unsigned char cc_peekdatabyte(unsigned int adr){
407 cc_debug(3, 0x90, hb, lb);
409 //Must be 2, perhaps for clocking?
410 toret=cc_debug(3, 0xE0, 0, 0);
414 DEBUG_INSTR(IN: 0x90, HIBYTE(address), LOBYTE(address), OUT: Discard);
415 for (n = 0; n < count; n++) {
416 DEBUG_INSTR(IN: 0xE0, OUT: outputArray[n]);
417 DEBUG_INSTR(IN: 0xA3, OUT: Discard);