2 \author Travis Goodspeed
3 \brief Glitching Support for GoodFET20
5 See the TI example MSP430x261x_dac12_01.c for usage of the DAC.
6 This module sends odd and insufficient voltages on P6.6/DAC0
7 in order to bypass security restrictions of target devices.
15 //! Call this before the function to be glitched.
18 //Set to high voltage.
22 TACTL=0; //Clear dividers.
23 TACTL|=TACLR; //Clear TimerA Config
25 TASSEL_SMCLK | //SMCLK source,
26 MC_1; //Count up to CCR0
27 //TAIE; //Enable Interrupt
28 CCTL0 = CCIE; // CCR0 interrupt enabled
31 //Enable general interrupts, just in case.
39 //Set GSEL high to disable glitching.
49 WDTCTL = WDTPW + WDTHOLD; // Stop WDT
50 TACTL = TASSEL1 + TACLR; // SMCLK, clear TAR
51 CCTL0 = CCIE; // CCR0 interrupt enabled
53 TACTL |= MC1; // Start Timer_A in continuous mode
54 _EINT(); // Enable interrupts
58 //! Setup analog chain for glitching.
59 void glitchsetupdac(){
60 glitchvoltages(glitchL,glitchH);
63 // Timer A0 interrupt service routine
64 interrupt(TIMERA0_VECTOR) Timer_A (void)
67 //debugstr("Glitching.");
68 DAC12_0DAT = 0;//glitchL;
71 //DAC12_0DAT = glitchL;
96 u16 glitchH=0xfff, glitchL=0xfff,
97 glitchstate=2, glitchcount=0;
99 //! Glitch an application.
100 void glitchapp(u8 app){
101 debugstr("That app is not yet supported.");
105 //! Set glitching voltages.
106 void glitchvoltages(u16 low, u16 high){
111 //debugstr("Set glitching voltages.");
114 ADC12CTL0 = REF2_5V + REFON; // Internal 2.5V ref on
115 // Delay here for reference to settle.
116 for(i=0;i!=0xFFFF;i++) asm("nop");
117 DAC12_0CTL = DAC12IR + DAC12AMP_5 + DAC12ENC; // Int ref gain 1
118 // 1.0V 0x0666, 2.5V 0x0FFF
120 //DAC12_0DAT = 0x0880;
123 //! Set glitching rate.
124 void glitchrate(u16 rate){
129 //! Handles a monitor command.
130 void glitchhandle(unsigned char app,
135 glitchvoltages(cmddataword[0],
140 glitchrate(cmddataword[0]);
144 //FIXME parameters don't work yet.
146 handle(cmddata[0],cmddata[1],0);
152 debugstr("Unknown glitching verb.");