2 \author Travis Goodspeed <travis at radiantmachines.com>
4 This is an implementation of the 16-bit MSP430 JTAG protocol
5 for the GoodFET project at http://goodfet.sf.net/
7 See the license file for details of proper use.
15 unsigned int jtag430mode=MSP430X2MODE;
17 //! Set the program counter.
18 void jtag430_setpc(unsigned int adr){
19 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
20 jtag_dr_shift16(0x3401);// release low byte
21 jtag_ir_shift8(IR_DATA_16BIT);
22 jtag_dr_shift16(0x4030);//Instruction to load PC
25 jtag_dr_shift16(adr);// Value for PC
27 jtag_ir_shift8(IR_ADDR_CAPTURE);
29 CLRTCLK ;// Now PC is set to "PC_Value"
30 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
31 jtag_dr_shift16(0x2401);// low byte controlled by JTAG
35 void jtag430_haltcpu(){
36 //jtag430_setinstrfetch();
38 jtag_ir_shift8(IR_DATA_16BIT);
39 jtag_dr_shift16(0x3FFF);//JMP $+0
42 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
43 jtag_dr_shift16(0x2409);//set JTAG_HALT bit
48 void jtag430_releasecpu(){
50 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
51 jtag_dr_shift16(0x2401);
52 jtag_ir_shift8(IR_ADDR_CAPTURE);
56 //! Read data from address
57 unsigned int jtag430_readmem(unsigned int adr){
61 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
64 jtag_dr_shift16(0x2409);//word read
66 jtag_dr_shift16(0x2419);//byte read
67 jtag_ir_shift8(IR_ADDR_16BIT);
68 jtag_dr_shift16(adr);//address
69 jtag_ir_shift8(IR_DATA_TO_ADDR);
73 toret=jtag_dr_shift16(0x0000);//16 bit return
78 //! Write data to address.
79 void jtag430_writemem(unsigned int adr, unsigned int data){
81 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
83 jtag_dr_shift16(0x2408);//word write
85 jtag_dr_shift16(0x2418);//byte write
86 jtag_ir_shift8(IR_ADDR_16BIT);
88 jtag_ir_shift8(IR_DATA_TO_ADDR);
89 jtag_dr_shift16(data);
93 //! Write data to flash memory. Must be preconfigured.
94 void jtag430_writeflashword(unsigned int adr, unsigned int data){
97 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
98 jtag_dr_shift16(0x2408);//word write
99 jtag_ir_shift8(IR_ADDR_16BIT);
100 jtag_dr_shift16(adr);
101 jtag_ir_shift8(IR_DATA_TO_ADDR);
102 jtag_dr_shift16(data);
105 //Return to read mode.
107 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
108 jtag_dr_shift16(0x2409);
111 jtag430_writemem(adr,data);
113 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
114 jtag_dr_shift16(0x2409);
117 jtag430_tclk_flashpulses(35); //35 standard
121 //! Configure flash, then write a word.
122 void jtag430_writeflash(unsigned int adr, unsigned int data){
125 //FCTL1=0xA540, enabling flash write
126 jtag430_writemem(0x0128, 0xA540);
127 //FCTL2=0xA540, selecting MCLK as source, DIV=1
128 jtag430_writemem(0x012A, 0xA540);
129 //FCTL3=0xA500, should be 0xA540 for Info Seg A on 2xx chips.
130 jtag430_writemem(0x012C, 0xA500);
132 //Write the word itself.
133 jtag430_writeflashword(adr,data);
135 //FCTL1=0xA500, disabling flash write
136 jtag430_writemem(0x0128, 0xA500);
138 jtag430_releasecpu();
148 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
149 jtag_dr_shift16(0x2C01); // apply
150 jtag_dr_shift16(0x2401); // remove
156 jtagid = jtag_ir_shift8(IR_ADDR_CAPTURE); // get JTAG identifier
159 jtag430_writemem(0x0120, 0x5A80); // Diabled Watchdog
164 #define ERASE_GLOB 0xA50E
165 #define ERASE_ALLMAIN 0xA50C
166 #define ERASE_MASS 0xA506
167 #define ERASE_MAIN 0xA504
168 #define ERASE_SGMT 0xA502
170 //! Configure flash, then write a word.
171 void jtag430_eraseflash(unsigned int mode, unsigned int adr, unsigned int count){
175 jtag430_writemem(0x0128, mode);
176 //FCTL2=0xA540, selecting MCLK as source, DIV=1
177 jtag430_writemem(0x012A, 0xA540);
178 //FCTL3=0xA500, should be 0xA540 for Info Seg A on 2xx chips.
179 jtag430_writemem(0x012C, 0xA500);
181 //Write the erase word.
182 jtag430_writemem(adr, 0x55AA);
183 //Return to read mode.
185 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
186 jtag_dr_shift16(0x2409);
189 jtag430_tclk_flashpulses(count);
191 //FCTL1=0xA500, disabling flash write
192 jtag430_writemem(0x0128, 0xA500);
194 jtag430_releasecpu();
198 //! Reset the TAP state machine.
199 void jtag430_resettap(){
207 // Navigate to reset state.
208 // Should be at least six.
223 Sometimes this isn't necessary. */
235 //! Start JTAG, take pins
236 void jtag430_start(){
239 //Known-good starting position.
240 //Might be unnecessary.
245 //Entry sequence from Page 67 of SLAU265A for 4-wire MSP430 JTAG
256 //Perform a reset and disable watchdog.
260 //! Set CPU to Instruction Fetch
261 void jtag430_setinstrfetch(){
262 jtag_ir_shift8(IR_CNTRL_SIG_CAPTURE);
264 // Wait until instruction fetch state.
266 if (jtag_dr_shift16(0x0000) & 0x0080)
274 //! Handles classic MSP430 JTAG commands. Forwards others to JTAG.
275 void oldjtag430handle(unsigned char app,
283 //TAP setup, fuse check
288 case JTAG430_HALTCPU:
292 case JTAG430_RELEASECPU:
293 jtag430_releasecpu();
296 case JTAG430_SETINSTRFETCH:
297 jtag430_setinstrfetch();
301 case JTAG430_READMEM:
303 cmddataword[0]=jtag430_readmem(cmddataword[0]);
306 case JTAG430_WRITEMEM:
308 jtag430_writemem(cmddatalong[0],cmddataword[2]);
309 cmddataword[0]=jtag430_readmem(cmddatalong[0]);
312 case JTAG430_WRITEFLASH:
313 jtag430_writeflash(cmddataword[0],cmddataword[1]);
314 cmddataword[0]=jtag430_readmem(cmddataword[0]);
317 case JTAG430_ERASEFLASH:
318 jtag430_eraseflash(ERASE_MASS,0xFFFE,0xFFFF);
319 jtag430_eraseflash(ERASE_MASS,0xFFFE,0xFFFF);
320 jtag430_eraseflash(ERASE_MASS,0xFFFE,0xFFFF);
324 jtag430_setpc(cmddataword[0]);
328 jtaghandle(app,verb,len);
333 //! Handles unique MSP430 JTAG commands. Forwards others to JTAG.
334 void jtag430handle(unsigned char app,
339 return oldjtag430handle(app,verb,len);
341 return jtag430x2handle(app,verb,len);