7 unsigned int jtag430mode=MSP430X2MODE;
9 //! Set the program counter.
10 void jtag430_setpc(unsigned int adr){
11 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
12 jtag_dr_shift16(0x3401);// release low byte
13 jtag_ir_shift8(IR_DATA_16BIT);
14 jtag_dr_shift16(0x4030);//Instruction to load PC
17 jtag_dr_shift16(adr);// Value for PC
19 jtag_ir_shift8(IR_ADDR_CAPTURE);
21 CLRTCLK ;// Now PC is set to "PC_Value"
22 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
23 jtag_dr_shift16(0x2401);// low byte controlled by JTAG
27 void jtag430_haltcpu(){
28 //jtag430_setinstrfetch();
30 jtag_ir_shift8(IR_DATA_16BIT);
31 jtag_dr_shift16(0x3FFF);//JMP $+0
34 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
35 jtag_dr_shift16(0x2409);//set JTAG_HALT bit
40 void jtag430_releasecpu(){
42 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
43 jtag_dr_shift16(0x2401);
44 jtag_ir_shift8(IR_ADDR_CAPTURE);
48 //! Read data from address
49 unsigned int jtag430_readmem(unsigned int adr){
53 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
56 jtag_dr_shift16(0x2409);//word read
58 jtag_dr_shift16(0x2419);//byte read
59 jtag_ir_shift8(IR_ADDR_16BIT);
60 jtag_dr_shift16(adr);//address
61 jtag_ir_shift8(IR_DATA_TO_ADDR);
65 toret=jtag_dr_shift16(0x0000);//16 bit return
70 //! Write data to address.
71 void jtag430_writemem(unsigned int adr, unsigned int data){
73 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
75 jtag_dr_shift16(0x2408);//word write
77 jtag_dr_shift16(0x2418);//byte write
78 jtag_ir_shift8(IR_ADDR_16BIT);
80 jtag_ir_shift8(IR_DATA_TO_ADDR);
81 jtag_dr_shift16(data);
85 //! Write data to flash memory. Must be preconfigured.
86 void jtag430_writeflashword(unsigned int adr, unsigned int data){
89 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
90 jtag_dr_shift16(0x2408);//word write
91 jtag_ir_shift8(IR_ADDR_16BIT);
93 jtag_ir_shift8(IR_DATA_TO_ADDR);
94 jtag_dr_shift16(data);
97 //Return to read mode.
99 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
100 jtag_dr_shift16(0x2409);
103 jtag430_writemem(adr,data);
105 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
106 jtag_dr_shift16(0x2409);
109 jtag430_tclk_flashpulses(35); //35 standard
113 //! Configure flash, then write a word.
114 void jtag430_writeflash(unsigned int adr, unsigned int data){
117 //FCTL1=0xA540, enabling flash write
118 jtag430_writemem(0x0128, 0xA540);
119 //FCTL2=0xA540, selecting MCLK as source, DIV=1
120 jtag430_writemem(0x012A, 0xA540);
121 //FCTL3=0xA500, should be 0xA540 for Info Seg A on 2xx chips.
122 jtag430_writemem(0x012C, 0xA500);
124 //Write the word itself.
125 jtag430_writeflashword(adr,data);
127 //FCTL1=0xA500, disabling flash write
128 jtag430_writemem(0x0128, 0xA500);
130 jtag430_releasecpu();
140 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
141 jtag_dr_shift16(0x2C01); // apply
142 jtag_dr_shift16(0x2401); // remove
148 jtagid = jtag_ir_shift8(IR_ADDR_CAPTURE); // get JTAG identifier
151 jtag430_writemem(0x0120, 0x5A80); // Diabled Watchdog
156 #define ERASE_GLOB 0xA50E
157 #define ERASE_ALLMAIN 0xA50C
158 #define ERASE_MASS 0xA506
159 #define ERASE_MAIN 0xA504
160 #define ERASE_SGMT 0xA502
162 //! Configure flash, then write a word.
163 void jtag430_eraseflash(unsigned int mode, unsigned int adr, unsigned int count){
167 jtag430_writemem(0x0128, mode);
168 //FCTL2=0xA540, selecting MCLK as source, DIV=1
169 jtag430_writemem(0x012A, 0xA540);
170 //FCTL3=0xA500, should be 0xA540 for Info Seg A on 2xx chips.
171 jtag430_writemem(0x012C, 0xA500);
173 //Write the erase word.
174 jtag430_writemem(adr, 0x55AA);
175 //Return to read mode.
177 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
178 jtag_dr_shift16(0x2409);
181 jtag430_tclk_flashpulses(count);
183 //FCTL1=0xA500, disabling flash write
184 jtag430_writemem(0x0128, 0xA500);
186 jtag430_releasecpu();
190 //! Reset the TAP state machine.
191 void jtag430_resettap(){
199 // Navigate to reset state.
200 // Should be at least six.
215 Sometimes this isn't necessary. */
227 //! Start JTAG, take pins
228 void jtag430_start(){
231 //Known-good starting position.
232 //Might be unnecessary.
237 //Entry sequence from Page 67 of SLAU265A for 4-wire MSP430 JTAG
248 //Perform a reset and disable watchdog.
252 //! Set CPU to Instruction Fetch
253 void jtag430_setinstrfetch(){
254 jtag_ir_shift8(IR_CNTRL_SIG_CAPTURE);
256 // Wait until instruction fetch state.
258 if (jtag_dr_shift16(0x0000) & 0x0080)
266 //! Handles classic MSP430 JTAG commands. Forwards others to JTAG.
267 void oldjtag430handle(unsigned char app,
275 //TAP setup, fuse check
280 case JTAG430_HALTCPU:
284 case JTAG430_RELEASECPU:
285 jtag430_releasecpu();
288 case JTAG430_SETINSTRFETCH:
289 jtag430_setinstrfetch();
293 case JTAG430_READMEM:
295 cmddataword[0]=jtag430_readmem(cmddataword[0]);
298 case JTAG430_WRITEMEM:
300 jtag430_writemem(cmddatalong[0],cmddataword[2]);
301 cmddataword[0]=jtag430_readmem(cmddatalong[0]);
304 case JTAG430_WRITEFLASH:
305 jtag430_writeflash(cmddataword[0],cmddataword[1]);
306 cmddataword[0]=jtag430_readmem(cmddataword[0]);
309 case JTAG430_ERASEFLASH:
310 jtag430_eraseflash(ERASE_MASS,0xFFFE,0xFFFF);
311 jtag430_eraseflash(ERASE_MASS,0xFFFE,0xFFFF);
312 jtag430_eraseflash(ERASE_MASS,0xFFFE,0xFFFF);
316 jtag430_setpc(cmddataword[0]);
320 jtaghandle(app,verb,len);
325 //! Handles unique MSP430 JTAG commands. Forwards others to JTAG.
326 void jtag430handle(unsigned char app,
331 return oldjtag430handle(app,verb,len);
333 return jtag430x2handle(app,verb,len);