2 \author Travis Goodspeed <travis at radiantmachines.com>
3 \brief MSP430 JTAG (16-bit)
11 unsigned int jtag430mode=MSP430X2MODE;
13 //! Set the program counter.
14 void jtag430_setpc(unsigned int adr){
15 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
16 jtag_dr_shift16(0x3401);// release low byte
17 jtag_ir_shift8(IR_DATA_16BIT);
18 jtag_dr_shift16(0x4030);//Instruction to load PC
21 jtag_dr_shift16(adr);// Value for PC
23 jtag_ir_shift8(IR_ADDR_CAPTURE);
25 CLRTCLK ;// Now PC is set to "PC_Value"
26 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
27 jtag_dr_shift16(0x2401);// low byte controlled by JTAG
31 void jtag430_haltcpu(){
32 //jtag430_setinstrfetch();
34 jtag_ir_shift8(IR_DATA_16BIT);
35 jtag_dr_shift16(0x3FFF);//JMP $+0
38 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
39 jtag_dr_shift16(0x2409);//set JTAG_HALT bit
44 void jtag430_releasecpu(){
46 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
47 jtag_dr_shift16(0x2401);
48 jtag_ir_shift8(IR_ADDR_CAPTURE);
52 //! Read data from address
53 unsigned int jtag430_readmem(unsigned int adr){
57 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
60 jtag_dr_shift16(0x2409);//word read
62 jtag_dr_shift16(0x2419);//byte read
63 jtag_ir_shift8(IR_ADDR_16BIT);
64 jtag_dr_shift16(adr);//address
65 jtag_ir_shift8(IR_DATA_TO_ADDR);
69 toret=jtag_dr_shift16(0x0000);//16 bit return
74 //! Write data to address.
75 void jtag430_writemem(unsigned int adr, unsigned int data){
77 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
79 jtag_dr_shift16(0x2408);//word write
81 jtag_dr_shift16(0x2418);//byte write
82 jtag_ir_shift8(IR_ADDR_16BIT);
84 jtag_ir_shift8(IR_DATA_TO_ADDR);
85 jtag_dr_shift16(data);
89 //! Write data to flash memory. Must be preconfigured.
90 void jtag430_writeflashword(unsigned int adr, unsigned int data){
93 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
94 jtag_dr_shift16(0x2408);//word write
95 jtag_ir_shift8(IR_ADDR_16BIT);
97 jtag_ir_shift8(IR_DATA_TO_ADDR);
98 jtag_dr_shift16(data);
101 //Return to read mode.
103 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
104 jtag_dr_shift16(0x2409);
107 jtag430_writemem(adr,data);
109 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
110 jtag_dr_shift16(0x2409);
113 jtag430_tclk_flashpulses(35); //35 standard
117 //! Configure flash, then write a word.
118 void jtag430_writeflash(unsigned int adr, unsigned int data){
121 //FCTL1=0xA540, enabling flash write
122 jtag430_writemem(0x0128, 0xA540);
123 //FCTL2=0xA540, selecting MCLK as source, DIV=1
124 jtag430_writemem(0x012A, 0xA540);
125 //FCTL3=0xA500, should be 0xA540 for Info Seg A on 2xx chips.
126 jtag430_writemem(0x012C, 0xA500);
128 //Write the word itself.
129 jtag430_writeflashword(adr,data);
131 //FCTL1=0xA500, disabling flash write
132 jtag430_writemem(0x0128, 0xA500);
134 jtag430_releasecpu();
144 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
145 jtag_dr_shift16(0x2C01); // apply
146 jtag_dr_shift16(0x2401); // remove
152 jtagid = jtag_ir_shift8(IR_ADDR_CAPTURE); // get JTAG identifier
155 jtag430_writemem(0x0120, 0x5A80); // Diabled Watchdog
160 #define ERASE_GLOB 0xA50E
161 #define ERASE_ALLMAIN 0xA50C
162 #define ERASE_MASS 0xA506
163 #define ERASE_MAIN 0xA504
164 #define ERASE_SGMT 0xA502
166 //! Configure flash, then write a word.
167 void jtag430_eraseflash(unsigned int mode, unsigned int adr, unsigned int count){
171 jtag430_writemem(0x0128, mode);
172 //FCTL2=0xA540, selecting MCLK as source, DIV=1
173 jtag430_writemem(0x012A, 0xA540);
174 //FCTL3=0xA500, should be 0xA540 for Info Seg A on 2xx chips.
175 jtag430_writemem(0x012C, 0xA500);
177 //Write the erase word.
178 jtag430_writemem(adr, 0x55AA);
179 //Return to read mode.
181 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
182 jtag_dr_shift16(0x2409);
185 jtag430_tclk_flashpulses(count);
187 //FCTL1=0xA500, disabling flash write
188 jtag430_writemem(0x0128, 0xA500);
190 jtag430_releasecpu();
194 //! Reset the TAP state machine.
195 void jtag430_resettap(){
203 // Navigate to reset state.
204 // Should be at least six.
219 Sometimes this isn't necessary. */
231 //! Start JTAG, take pins
232 void jtag430_start(){
235 //Known-good starting position.
236 //Might be unnecessary.
241 //Entry sequence from Page 67 of SLAU265A for 4-wire MSP430 JTAG
252 //Perform a reset and disable watchdog.
256 //! Set CPU to Instruction Fetch
257 void jtag430_setinstrfetch(){
258 jtag_ir_shift8(IR_CNTRL_SIG_CAPTURE);
260 // Wait until instruction fetch state.
262 if (jtag_dr_shift16(0x0000) & 0x0080)
270 //! Handles classic MSP430 JTAG commands. Forwards others to JTAG.
271 void oldjtag430handle(unsigned char app,
279 //TAP setup, fuse check
284 case JTAG430_HALTCPU:
288 case JTAG430_RELEASECPU:
289 jtag430_releasecpu();
292 case JTAG430_SETINSTRFETCH:
293 jtag430_setinstrfetch();
297 case JTAG430_READMEM:
299 cmddataword[0]=jtag430_readmem(cmddataword[0]);
302 case JTAG430_WRITEMEM:
304 jtag430_writemem(cmddatalong[0],cmddataword[2]);
305 cmddataword[0]=jtag430_readmem(cmddatalong[0]);
308 case JTAG430_WRITEFLASH:
309 jtag430_writeflash(cmddataword[0],cmddataword[1]);
310 cmddataword[0]=jtag430_readmem(cmddataword[0]);
313 case JTAG430_ERASEFLASH:
314 jtag430_eraseflash(ERASE_MASS,0xFFFE,0xFFFF);
315 jtag430_eraseflash(ERASE_MASS,0xFFFE,0xFFFF);
316 jtag430_eraseflash(ERASE_MASS,0xFFFE,0xFFFF);
320 jtag430_setpc(cmddataword[0]);
324 jtaghandle(app,verb,len);
329 //! Handles unique MSP430 JTAG commands. Forwards others to JTAG.
330 void jtag430handle(unsigned char app,
335 return oldjtag430handle(app,verb,len);
337 return jtag430x2handle(app,verb,len);