Dropped ugly 'blocks' kludge for a 16-bit length field.
[goodfet] / firmware / apps / jtag / jtag430asm.S
1 .globl jtag430_tclk_flashpulses
2 .type jtag430_tclk_flashpulses,@function //for linking
3
4 //This detects model, chooses appropriate timing.
5 jtag430_tclk_flashpulses:
6         mov &0x0ff0, r14
7         cmp  #0x6cf1, r14       ;Is the chip an MSP430F1xx?
8         jz jtag430_tclk_flashpulses_3mhz
9         jmp jtag430_tclk_flashpulses_16mhz
10         
11 // At 3.68MHz, 7 to 14 cycles/loop are allowed for 257 to 475kHz.
12 // At 16MHz, 33 to 62 cycles/loop are allowed.
13 jtag430_tclk_flashpulses_3mhz:
14         mov #0x0031, r14
15 pulseloop3:
16         bis.b #2, @r14          ;SETTCLK, 3 cycles
17         sub #1, r15             ; 1 cycle
18         ;;  1+3+3+1+2=10, within limits
19         nop
20         nop
21         nop                     ;10+3=13
22         
23         bic.b #2, @r14          ;CLRTCLK, 3 cycles
24         tst r15                 ; 1 cycle
25         jnz pulseloop3          ; 2 cycles
26         ret
27
28 jtag430_tclk_flashpulses_16mhz:
29         mov #0x0031, r14
30 pulseloop16:    
31         bis.b #2, @r14          ;SETTCLK, 3 cycles
32         sub #1, r15             ; 1 cycle
33         ;;  1+3+3+1+2=10, beneath limits,
34
35         ;; +3+2=5, repeat 8 times to get 10+40=50, within limits
36         push r11                ; 3 cycles
37         pop r11                 ; 2 cycles
38         push r11                ; 3 cycles
39         pop r11                 ; 2 cycles
40         push r11                ; 3 cycles
41         pop r11                 ; 2 cycles
42         push r11                ; 3 cycles
43         pop r11                 ; 2 cycles
44         push r11                ; 3 cycles
45         pop r11                 ; 2 cycles
46         push r11                ; 3 cycles
47         pop r11                 ; 2 cycles
48         push r11                ; 3 cycles
49         pop r11                 ; 2 cycles
50         push r11                ; 3 cycles
51         pop r11                 ; 2 cycles
52         
53         
54         bic.b #2, @r14          ;CLRTCLK, 3 cycles
55         tst r15                 ; 1 cycle
56         jnz pulseloop16         ; 2 cycles
57         ret
58