2 \author Travis Goodspeed <travis at radiantmachines.com>
3 \brief MSP430X2 JTAG (20-bit)
13 unsigned char jtag430x2_jtagid(){
15 return jtagid=jtag_ir_shift8(IR_BYPASS);
17 //! Start JTAG, take pins
18 unsigned char jtag430x2_start(){
21 //Known-good starting position.
22 //Might be unnecessary.
28 //Entry sequence from Page 67 of SLAU265A for 4-wire MSP430 JTAG
41 //Perform a reset and disable watchdog.
42 return jtag430x2_jtagid();
46 unsigned int jtag430_coreid(){
47 jtag_ir_shift8(IR_COREIP_ID);
48 return jtag_dr_shift16(0);
51 //! Grab the device ID.
52 unsigned long jtag430_deviceid(){
53 jtag_ir_shift8(IR_DEVICE_ID);
54 return jtag_dr_shift20(0);
58 //! Write data to address
59 void jtag430x2_writemem(unsigned long adr,
61 jtag_ir_shift8(IR_CNTRL_SIG_CAPTURE);
62 if(jtag_dr_shift16(0) & 0x0301){
64 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
66 jtag_dr_shift16(0x0500);//word mode
68 jtag_dr_shift16(0x0510);//byte mode
69 jtag_ir_shift8(IR_ADDR_16BIT);
74 jtag_ir_shift8(IR_DATA_TO_ADDR);
75 jtag_dr_shift16(data);//16 word
78 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
79 jtag_dr_shift16(0x0501);
86 while(1) PLEDOUT^=PLEDPIN; //loop if locked up
90 //! Read data from address
91 unsigned int jtag430x2_readmem(unsigned long adr){
93 //unsigned int tries=5;
97 jtag_ir_shift8(IR_CNTRL_SIG_CAPTURE);
98 //}while(!(jtag_dr_shift16(0) & 0x0301));
100 if(jtag_dr_shift16(0) & 0x0301){
103 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
106 jtag_dr_shift16(0x0501);//word read
108 //jtag_dr_shift16(0x0511);//byte read
111 jtag_ir_shift8(IR_ADDR_16BIT);
112 jtag_dr_shift20(adr); //20
114 jtag_ir_shift8(IR_DATA_TO_ADDR);
117 toret = jtag_dr_shift16(0x0000);
131 unsigned int jtag430x2_syncpor(){
132 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
133 jtag_dr_shift16(0x1501); //JTAG mode
134 while(!(jtag_dr_shift16(0) & 0x200));
135 return jtag430x2_por();
138 //! Executes an MSP430X2 POR
139 unsigned int jtag430x2_por(){
146 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
147 jtag_dr_shift16(0x0C01);
148 jtag_dr_shift16(0x0401);
151 for (i = 0; i < 10; i++){
156 jtag_dr_shift16(0x0501);
164 jtag430x2_writemem(0x015C, 0x5A80);
167 jtag_ir_shift8(IR_CNTRL_SIG_CAPTURE);
168 if(jtag_dr_shift16(0) & 0x0301)
176 unsigned int jtag430x2_fusecheck(){
179 jtag_ir_shift8(IR_CNTRL_SIG_CAPTURE);
180 if(jtag_dr_shift16(0xAAAA)==0x5555)
187 //! Handles MSP430X2 JTAG commands. Forwards others to JTAG.
188 void jtag430x2handle(unsigned char app,
191 register char blocks;
196 //jtag430_resettap();
198 if(verb!=START && jtag430mode==MSP430MODE){
199 jtag430handle(app,verb,len);
207 cmddata[0]=jtag430x2_start();
208 //while(cmddata[0]==00 || cmddata[0]==0xFF);
211 if(jtagid==MSP430JTAGID){
212 jtag430mode=MSP430MODE;
214 /* So the way this works is that a width of 20 does some
215 backward-compatibility finagling, causing the correct value
216 to be exchanged for addresses on 16-bit chips as well as the
217 new MSP430X chips. (This has only been verified on the
218 MSP430F2xx family. TODO verify for others.)
223 //Perform a reset and disable watchdog.
225 jtag430_writemem(0x120,0x5a80);//disable watchdog
232 }else if(jtagid==MSP430X2JTAGID){
233 jtag430mode=MSP430X2MODE;
236 debugstr("JTAG version unknown.");
241 jtag430x2_fusecheck();
249 case JTAG430_READMEM:
251 blocks=(len>4?cmddata[4]:1);
255 txhead(app,verb,len);
262 val=jtag430x2_readmem(at);
266 serial_tx((val&0xFF00)>>8);
271 case JTAG430_COREIP_ID:
272 cmddataword[0]=jtag430_coreid();
275 case JTAG430_DEVICE_ID:
276 cmddatalong[0]=jtag430_deviceid();
279 case JTAG430_WRITEFLASH:
280 case JTAG430_WRITEMEM:
282 jtag430x2_writemem(cmddatalong[0],
284 cmddataword[0]=jtag430x2_readmem(cmddatalong[0]);
288 //unimplemented functions
289 case JTAG430_HALTCPU:
290 case JTAG430_RELEASECPU:
291 case JTAG430_SETINSTRFETCH:
293 case JTAG430_ERASEFLASH:
295 debugstr("This function is not yet implemented for MSP430X2.");
300 jtaghandle(app,verb,len);