3 \author Dave Huseby <dave@linuxprogrammer.org>
4 \brief Intel XScale JTAG
10 #include "jtagxscale.h"
12 /* From the Intel XScale Core Developer's Manual:
14 * The Intel XScale® core provides test features compatible with IEEE Standard
15 * Test Access Port and Boundary Scan Architecture (IEEE Std. 1149.1). These
16 * features include a TAP controller, a 5 or 7 bit instruction register, and
17 * test data registers to support software debug. The size of the instruction
18 * register depends on which variant of the Intel XScale® core is being used.
19 * This can be found out by examining the CoreGen field of Coprocessor 15, ID
20 * Register (bits 15:13). (See Table 7-4, "ID Register" on page 7-81 for more
21 * details.) A CoreGen value of 0x1 means the JTAG instruction register size
22 * is 5 bits and a CoreGen value of 0x2 means the JTAG instruction register
27 /* NOTE: I heavily cribbed from the ARM7TDMI jtag implementation. Credit where
30 /* this handles shifting arbitrary length bit strings into the instruction
31 * register and clocking out bits while leaving the JTAG state machine in a
32 * known state. it also handle bit swapping. */
33 unsigned long jtag_xscale_shift_n(unsigned long word,
38 unsigned long high = 1;
41 for (bit = (nbits - 1) / 8; bit > 0; bit--)
44 high <<= ((nbits - 1) % 8);
50 /* clock the bits into the IR from LSB to MSB order */
51 for (bit = nbits; bit > 0; bit--)
53 /* write MOSI on trailing edge of previous clock */
64 if (bit == 1 && !(flags & NOEND))
65 SETTMS; /* TMS high on last bit to exit. */
67 /* tick tock the clock line */
70 /* read MISO on trailing edge */
79 /* clock the bits into the IR from MSB to LSB order */
80 for (bit = nbits; bit > 0; bit--)
82 /* write MOSI on trailing edge of previous clock */
91 word = (word & mask) << 1;
93 if (bit == 1 && !(flags & NOEND))
94 SETTMS;//TMS high on last bit to exit.
96 /* tick tock the clock line */
99 /* read MISO on trailing edge */
106 if (!(flags & NOEND))
112 if (!(flags & NORETIDLE))
123 /* this handles shifting in the IDCODE instruction and shifting the result
124 * out the TDO and return it. */
125 unsigned long jtag_xscale_idcode()
127 /* NOTE: this assumes that we're in the run-test-idle state */
129 /* get into the shift-ir state */
132 /* shift the ID code instruction into the IR and return to run-test-idle */
133 jtag_xscale_shift_n(XSCALE_IR_IDCODE, 5, LSB);
135 /* get into the shift-dr state */
138 /* now clock out the 32 bit ID code and return back to run-test-idle */
139 return jtag_xscale_shift_n(0, 32, LSB);
142 /* Handles XScale JTAG commands. Forwards others to JTAG. */
143 void xscalehandle(unsigned char app,
154 /* set up the pin I/O for JTAG */
157 /* reset to run-test-idle state */
181 case XSCALE_GET_CHIP_ID:
183 /* reset to run-test-idle state */
186 /* put the ID code in the data buffer */
187 cmddatalong[0] = jtag_xscale_idcode();
189 /* send it back to the client */