3 \author Dave Huseby <dave@linuxprogrammer.org>
4 \brief Intel XScale JTAG
10 #include "jtagxscale.h"
12 #define JTAGXSCALE_APP
14 /* Handles XScale JTAG commands. Forwards others to JTAG. */
15 void jtag_xscale_handle_fn( uint8_t const app,
19 // define the jtag xscale app's app_t
20 app_t const jtagxscale_app = {
26 jtag_xscale_handle_fn,
32 "\tThe JTAG Xscale app extends the JTAG app adding support\n"
33 "\tfor JTAG'ing Intel XScale devices.\n"
37 /* From the Intel XScale Core Developer's Manual:
39 * The Intel XScale® core provides test features compatible with IEEE Standard
40 * Test Access Port and Boundary Scan Architecture (IEEE Std. 1149.1). These
41 * features include a TAP controller, a 5 or 7 bit instruction register, and
42 * test data registers to support software debug. The size of the instruction
43 * register depends on which variant of the Intel XScale® core is being used.
44 * This can be found out by examining the CoreGen field of Coprocessor 15, ID
45 * Register (bits 15:13). (See Table 7-4, "ID Register" on page 7-81 for more
46 * details.) A CoreGen value of 0x1 means the JTAG instruction register size
47 * is 5 bits and a CoreGen value of 0x2 means the JTAG instruction register
52 /* NOTE: I heavily cribbed from the ARM7TDMI jtag implementation. Credit where
55 /* this handles shifting arbitrary length bit strings into the instruction
56 * register and clocking out bits while leaving the JTAG state machine in a
57 * known state. it also handle bit swapping. */
58 unsigned long jtag_xscale_shift_n(unsigned long word,
63 unsigned long high = 1;
66 for (bit = (nbits - 1) / 8; bit > 0; bit--)
69 high <<= ((nbits - 1) % 8);
75 /* clock the bits into the IR from LSB to MSB order */
76 for (bit = nbits; bit > 0; bit--)
78 /* write MOSI on trailing edge of previous clock */
89 if (bit == 1 && !(flags & NOEND))
90 SETTMS; /* TMS high on last bit to exit. */
92 /* tick tock the clock line */
95 /* read MISO on trailing edge */
104 /* clock the bits into the IR from MSB to LSB order */
105 for (bit = nbits; bit > 0; bit--)
107 /* write MOSI on trailing edge of previous clock */
116 word = (word & mask) << 1;
118 if (bit == 1 && !(flags & NOEND))
119 SETTMS;//TMS high on last bit to exit.
121 /* tick tock the clock line */
124 /* read MISO on trailing edge */
131 if (!(flags & NOEND))
137 if (!(flags & NORETIDLE))
148 /* this handles shifting in the IDCODE instruction and shifting the result
149 * out the TDO and return it. */
150 unsigned long jtag_xscale_idcode()
152 /* NOTE: this assumes that we're in the run-test-idle state */
154 /* get into the shift-ir state */
157 /* shift the ID code instruction into the IR and return to run-test-idle */
158 jtag_xscale_shift_n(XSCALE_IR_IDCODE, 5, LSB);
160 /* get into the shift-dr state */
163 /* now clock out the 32 bit ID code and return back to run-test-idle */
164 return jtag_xscale_shift_n(0, 32, LSB);
167 /* Handles XScale JTAG commands. Forwards others to JTAG. */
168 void jtag_xscale_handle_fn( uint8_t const app,
179 /* set up the pin I/O for JTAG */
182 /* reset to run-test-idle state */
206 case XSCALE_GET_CHIP_ID:
208 /* reset to run-test-idle state */
211 /* put the ID code in the data buffer */
212 cmddatalong[0] = jtag_xscale_idcode();
214 /* send it back to the client */