3 \author Dave Huseby <huseby at linuxprogrammer.org>
4 \brief Intel XScale JTAG
7 /* NOTE: I heavily cribbed from the ARM7TDMI jtag implementation. Credit where
14 /* XTT (LED TCK TOCK) toggles the CLK line while turning on/off the LED */
15 #define XTT CLRTCK;PLEDOUT^=PLEDPIN;SETTCK;PLEDOUT^=PLEDPIN;
17 /* RUN_TEST_IDLE gets us into run-test-idle from anywhere in the TAP FSM */
18 #define RUN_TEST_IDLE SETTMS;XTT;XTT;XTT;XTT;XTT;XTT;XTT;XTT;CLRTMS;XTT;
20 /* SHIFT_IR gets us into the "Shift IR" state from the run-test-idle state */
21 #define SHIFT_IR SETTMS;XTT;XTT;CLRTMS;XTT;XTT;
23 /* SHIFT_DIR gets us into the "Shift DR" state from the run-test-idle state */
24 #define SHIFT_DR SETTMS;XTT;CLRTMS;XTT;XTT;
28 * XScale 5-bit JTAG Commands
31 /* On the XScale chip, the TDI pin is connected to the MSB of the IR and the
32 * TDO is connected to the LSB. That means we have to shift these commands
33 * in from LSB to MSB order. */
36 * The highz instruction floats all three-stateable output and in/out pins.
37 * Also, when this instruction is active, the Bypass register is connected
38 * between TDI and TDO. This register can be accessed via the JTAG Test-Access
39 * Port throughout the device operation. Access to the Bypass register can also
40 * be obtained with the bypass instruction. */
41 #define XSCALE_IR_HIGHZ 0x08
43 /* 11110 - Get ID Code
44 * The idcode instruction is used in conjunction with the device identification
45 * register. It connects the identification register between TDI and TDO in the
46 * Shift_DR state. When selected, idcode parallel-loads the hard-wired
47 * identification code (32 bits) on TDO into the identification register on the
48 * rising edge of TCK in the Capture_DR state. Note: The device identification
49 * register is not altered by data being shifted in on TDI.*/
50 #define XSCALE_IR_IDCODE 0x1E
53 * The bypass instruction selects the Bypass register between TDI and TDO pins
54 * while in SHIFT_DR state, effectively bypassing the processor’s test logic.
55 * 02 is captured in the CAPTURE_DR state. While this instruction is in effect,
56 * all other test data registers have no effect on the operation of the system.
57 * Test data registers with both test and system functionality perform their
58 * system functions when this instruction is selected. */
59 #define XSCALE_IR_BYPASS 0x1F
62 * GoodFET Commands from the Client
66 #define XSCALE_GET_CHIP_ID 0xF1
73 /* this handles shifting arbitrary length bit strings into the instruction
74 * register and clocking out bits while leaving the JTAG state machine in a
75 * known state. it also handle bit swapping. */
76 unsigned long jtag_xscale_shift_n(unsigned long word,
80 /* this handles shifting in the IDCODE instruction and shifting the result
81 * out the TDO and return it. */
82 unsigned long jtag_xscale_idcode();