2 #include "cc1110-ext.h"
4 char __xdata at 0xfe00 packet[256] ;
6 // Set the system clock source to HS XOSC and max CPU speed,
7 // ref. [clk]=>[clk_xosc.c]
8 SLEEP &= ~SLEEP_OSC_PD;
9 while( !(SLEEP & SLEEP_XOSC_S) );
10 CLKCON = (CLKCON & ~(CLKCON_CLKSPD | CLKCON_OSC)) | CLKSPD_DIV_1;
11 while (CLKCON & CLKCON_OSC);
12 SLEEP |= SLEEP_OSC_PD;
15 /* Setup radio with settings from SmartRF® Studio. The default settings are
16 * used, except that "unmodulated" is chosen in the "Simple RX tab". This
17 * results in an umodulated carrier with a frequency of approx. 2.433 GHz.
19 //FSCTRL1 = 0x0A; // Frequency synthesizer control.
20 //FSCTRL0 = 0x00; // Frequency synthesizer control.
24 MDMCFG4 = 0x86; // Modem configuration.
25 MDMCFG3 = 0x83; // Modem configuration.
26 MDMCFG2 = 0x30; // Modem configuration.
27 MDMCFG1 = 0x22; // Modem configuration.
28 MDMCFG0 = 0xF8; // Modem configuration.
31 CHANNR = 0x00; // Channel number.
32 DEVIATN = 0x00; // Modem deviation setting (when FSK modulation is enabled).
33 FREND1 = 0x56; // Front end RX configuration.
34 FREND0 = 0x10; // Front end RX configuration.
35 MCSM0 = 0x14; // Main Radio Control State Machine configuration.
36 FOCCFG = 0x16; // Frequency Offset Compensation Configuration.
37 BSCFG = 0x6C; // Bit synchronization Configuration.
38 AGCCTRL2 = 0x03; // AGC control.
39 AGCCTRL1 = 0x40; // AGC control.
40 AGCCTRL0 = 0x91; // AGC control.
41 FSCAL3 = 0xE9; // Frequency synthesizer calibration.
42 FSCAL2 = 0x2a; // Frequency synthesizer calibration.
43 FSCAL1 = 0x00; // Frequency synthesizer calibration.
44 FSCAL0 = 0x1f; // Frequency synthesizer calibration
46 TEST2 = 0x88; // Various test settings.
47 TEST1 = 0x31; // Various test settings.
48 TEST0 = 0x09; // Various test settings.
51 PA_TABLE0 = 0xFF; // PA output power setting.
52 PKTCTRL1 = 0x04; // Packet automation control.
53 PKTCTRL0 = 0x22; // Packet automation control.
54 ADDR = 0x00; // Device address.
55 PKTLEN = 0xFF; // Packet length.
57 /* Settings not from SmartRF® Studio. Setting both sync word registers to
58 * 0xAA = 0b10101010, i.e., the same as the preamble pattern. Not necessary,
59 * but gives control of what the radio attempts to transmit.
62 //These sync values are better for jamming, but they break reception.
68 while ((MARCSTATE & MARCSTATE_MARC_STATE) != MARC_STATE_TX);
72 #define RFON RFST = RFST_SIDLE; RFST = RFST_STX; while ((MARCSTATE & MARCSTATE_MARC_STATE) != MARC_STATE_TX);
73 #define RFOFF RFST = RFST_SIDLE; //while ((MARCSTATE & MARCSTATE_MARC_STATE) != MARC_STATE_IDLE);
81 void sleepMillis(int ms) {
84 for (j=0; j<1200;j++); // about 1 millisecond
88 //! Wait for a packet to come, then immediately return.
97 while(MARCSTATE!=MARC_STATE_IDLE);
102 while(MARCSTATE!=MARC_STATE_RX);
109 while(i<PKTLEN && MARCSTATE==MARC_STATE_RX){
111 while(MARCSTATE==MARC_STATE_RX && !RFTXRXIF); //Wait for byte to be ready.
112 RFTXRXIF=0; //Clear the flag.
116 packet[i++]=RFD; //Grab the next byte.
122 //RFST = RFST_SIDLE; //End receive.
125 //! Reflexively jam on the present channel by responding to a signal with a carrier wave.
127 unsigned char threshold=packet[0], i=0, rssi=0;;
129 //Disable interrupts.
136 //while(MARCSTATE!=MARC_STATE_IDLE);
144 //while(MARCSTATE!=MARC_STATE_IDLE);
152 //Transmit carrier for 10ms
155 while(MARCSTATE!=MARC_STATE_TX);