"""A GoodFET variant for use with ARM7TDMI microprocessor."""
def ARMhaltcpu(self):
"""Halt the CPU."""
- self.writecmd(0x33,HALTCPU,0,self.data)
+ self.writecmd(0x13,HALTCPU,0,self.data)
def ARMreleasecpu(self):
"""Resume the CPU."""
- self.writecmd(0x33,RESUMECPU,0,self.data)
+ self.writecmd(0x13,RESUMECPU,0,self.data)
def ARMsetModeArm(self):
- self.writecmd(0x33,SET_MODE_ARM,0,self.data)
+ self.writecmd(0x13,SET_MODE_ARM,0,self.data)
def ARMtest(self):
- self.ARMreleasecpu()
- self.ARMhaltcpu()
+ #self.ARMreleasecpu()
+ #self.ARMhaltcpu()
print "Status: %s" % self.ARMstatusstr()
#Grab ident three times, should be equal.
print "%04x, %04x, %04x" % (ident1, ident2, ident3)
#Set and Check Registers
- regs = [1024+x for x in range(1,15)]
+ regs = [1024+x for x in range(0,15)]
regr = []
for x in range(len(regs)):
self.ARMset_register(x, regs[x])
def setup(self):
"""Move the FET into the JTAG ARM application."""
#print "Initializing ARM."
- self.writecmd(0x33,SETUP,0,self.data)
+ self.writecmd(0x13,SETUP,0,self.data)
def ARMget_dbgstate(self):
"""Read the config register of an ARM."""
+ self.writecmd(0x13,GET_DEBUG_STATE,0,self.data)
retval = struct.unpack("<L", self.data[:4])[0]
return retval
def ARMget_dbgctrl(self):
"""Read the config register of an ARM."""
- self.writecmd(0x33,GET_DEBUG_CTRL,0,self.data)
+ self.writecmd(0x13,GET_DEBUG_CTRL,0,self.data)
retval = struct.unpack("B", self.data)[0]
return retval
def ARMset_dbgctrl(self,config):
"""Write the config register of an ARM."""
- self.writecmd(0x33,SET_DEBUG_CTRL,1,[config&7])
+ self.writecmd(0x13,SET_DEBUG_CTRL,1,[config&7])
def ARMlockchip(self):
"""Set the flash lock bit in info mem."""
- self.writecmd(0x33, LOCKCHIP, 0, [])
+ self.writecmd(0x13, LOCKCHIP, 0, [])
def ARMidentstr(self):
return "mfg: %x\npartno: %x\nver: %x\n(%x)" % (ver, partno, mfgid, ident);
def ARMident(self):
"""Get an ARM's ID."""
- self.writecmd(0x33,GET_CHIP_ID,0,[])
+ self.writecmd(0x13,GET_CHIP_ID,0,[])
retval = struct.unpack("<L", "".join(self.data[0:4]))[0]
return retval
def ARMgetPC(self):
"""Get an ARM's PC."""
- self.writecmd(0x33,GET_PC,0,[])
+ self.writecmd(0x13,GET_PC,0,[])
retval = struct.unpack("<L", "".join(self.data[0:4]))[0]
return retval
def ARMget_register(self, reg):
"""Get an ARM's Register"""
- self.writecmd(0x33,GET_REGISTER,1,[reg&0xff])
+ self.writecmd(0x13,GET_REGISTER,1,[reg&0xff])
retval = struct.unpack("<L", "".join(self.data[0:4]))[0]
return retval
def ARMset_register(self, reg, val):
"""Get an ARM's Register"""
- self.writecmd(0x33,SET_REGISTER,8,[reg,0,0,0,val&0xff, (val>>8)&0xff, (val>>16)&0xff, val>>24])
- #self.writecmd(0x33,SET_REGISTER,8,[reg,0,0,0, (val>>16)&0xff, val>>24, val&0xff, (val>>8)&0xff])
+ self.writecmd(0x13,SET_REGISTER,8,[reg,0,0,0,val&0xff, (val>>8)&0xff, (val>>16)&0xff, val>>24])
+ #self.writecmd(0x13,SET_REGISTER,8,[reg,0,0,0, (val>>16)&0xff, val>>24, val&0xff, (val>>8)&0xff])
retval = struct.unpack("<L", "".join(self.data[0:4]))[0]
return retval
def ARMget_registers(self):
"""Get ARM Registers"""
- self.writecmd(0x33,GET_REGISTERS,0, [])
+ self.writecmd(0x13,GET_REGISTERS,0, [])
retval = []
for x in range(0,len(self.data), 4):
retval.append(struct.unpack("<L", self.data[x:x+4])[0])
regarry = []
for reg in regs:
regarry.extend([reg&0xff, (reg>>8)&0xff, (reg>>16)&0xff, reg>>24])
- self.writecmd(0x33,SET_REGISTERS,16*4,regarry)
+ self.writecmd(0x13,SET_REGISTERS,16*4,regarry)
retval = struct.unpack("<L", "".join(self.data[0:4]))[0]
return retval
def ARMcmd(self,phrase):
- self.writecmd(0x33,READ,len(phrase),phrase)
+ self.writecmd(0x13,READ,len(phrase),phrase)
val=ord(self.data[0])
print "Got %02x" % val
return val
def ARMdebuginstr(self,instr):
if type (instr) == int:
instr = struct.pack("<L", instr)
- self.writecmd(0x33,DEBUG_INSTR,len(instr),instr)
+ self.writecmd(0x13,DEBUG_INSTR,len(instr),instr)
return (self.data[0])
def ARMpeekcodebyte(self,adr):
"""Read the contents of code memory at an address."""
self.data=[adr&0xff, (adr&0xff00)>>8]
- self.writecmd(0x33,PEEK,2,self.data)
+ self.writecmd(0x13,PEEK,2,self.data)
retval = struct.unpack("<L", "".join(self.data[0:4]))[0]
return retval
def ARMpeekdatabyte(self,adr):
"""Read the contents of data memory at an address."""
self.data=[adr&0xff, (adr&0xff00)>>8]
- self.writecmd(0x33, PEEK, 2, self.data)
+ self.writecmd(0x13, PEEK, 2, self.data)
retval = struct.unpack("<L", "".join(self.data[0:4]))[0]
return retval
def ARMpokedatabyte(self,adr,val):
"""Write a byte to data memory."""
self.data=[adr&0xff, (adr&0xff00)>>8, val]
- self.writecmd(0x33, POKE, 3, self.data)
+ self.writecmd(0x13, POKE, 3, self.data)
retval = struct.unpack("<L", "".join(self.data[0:4]))[0]
return retval
def ARMchiperase(self):
"""Erase all of the target's memory."""
- self.writecmd(0x33,CHIP_ERASE,0,[])
+ self.writecmd(0x13,CHIP_ERASE,0,[])
def ARMstatus(self):
"""Check the status."""
- self.writecmd(0x33,GET_DEBUG_STATE,0,[])
+ self.writecmd(0x13,GET_DEBUG_STATE,0,[])
return ord(self.data[0])
ARMstatusbits={
0x10 : "TBIT",
return str
def start(self):
"""Start debugging."""
- self.writecmd(0x33,START,0,self.data)
+ self.writecmd(0x13,START,0,self.data)
#ident=self.ARMidentstr()
#print "Target identifies as %s." % ident
#print "Status: %s." % self.ARMstatusstr()
def stop(self):
"""Stop debugging."""
- self.writecmd(0x33,STOP,0,self.data)
+ self.writecmd(0x13,STOP,0,self.data)
def ARMstep_instr(self):
"""Step one instruction."""
- self.writecmd(0x33,STEP_INSTR,0,self.data)
+ self.writecmd(0x13,STEP_INSTR,0,self.data)
def ARMflashpage(self,adr):
"""Flash 2kB a page of flash from 0xF000 in XDATA"""
data=[adr&0xFF,
(adr>>16)&0xFF,
(adr>>24)&0xFF]
print "Flashing buffer to 0x%06x" % adr
- self.writecmd(0x33,MASS_FLASH_PAGE,4,data)
+ self.writecmd(0x13,MASS_FLASH_PAGE,4,data)
def writecmd(self, app, verb, count=0, data=[]):
"""Write a command and some data to the GoodFET."""
projects / goodfet / blobdiff