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Beginnings of an MCP2515 driver for communicating with a CAN bus.
[goodfet]
/
client
/
GoodFETAT91X40.py
diff --git
a/client/GoodFETAT91X40.py
b/client/GoodFETAT91X40.py
index
d1f152c
..
cb9c7a8
100644
(file)
--- a/
client/GoodFETAT91X40.py
+++ b/
client/GoodFETAT91X40.py
@@
-249,7
+249,7
@@
mcr_ale = {
}
def mcr_decode(mcr):
}
def mcr_decode(mcr):
- validAddrBits,maxAddrSpace,validCS,codeLabel = mcr_
decod
e[mcr&7]
+ validAddrBits,maxAddrSpace,validCS,codeLabel = mcr_
al
e[mcr&7]
drp = mcr>>4
output = ["Valid Address Bits: %s"%validAddrBits,
"Maximum Address Space: %xMB"%maxAddrSpace,
drp = mcr>>4
output = ["Valid Address Bits: %s"%validAddrBits,
"Maximum Address Space: %xMB"%maxAddrSpace,
@@
-299,7
+299,7
@@
class GoodFETAT91X40(GoodFETARM):
def setRemap(self):
self.ARMwriteChunk(EBI_BASE + EBI_OFF_RCR,[REMAP_CMD])
def getMemoryControlRegister(self):
def setRemap(self):
self.ARMwriteChunk(EBI_BASE + EBI_OFF_RCR,[REMAP_CMD])
def getMemoryControlRegister(self):
- mcr = self.ARMreadMem(EBI_MCR)
+ mcr
,
= self.ARMreadMem(EBI_MCR)
return mcr
def getMemoryControlRegisterstr(self):
return mcr_decode(self.getMemoryControlRegister())
return mcr
def getMemoryControlRegisterstr(self):
return mcr_decode(self.getMemoryControlRegister())
@@
-429,3
+429,14
@@
class GoodFETAT91X40(GoodFETARM):
self.ARMsetPC(PROGGYBASE)
self.release()
# FIXME: use DCC to upload the new firmware
self.ARMsetPC(PROGGYBASE)
self.release()
# FIXME: use DCC to upload the new firmware
+
+ def clearFlash(self):
+ pass
+
+ def readPages(self, addr, pagecount, pagesz=(1024*1024)):
+ global pages;
+ pages = []
+ for page in xrange(pagecount):
+ pages.append(self.ARMreadChunk(addr+(pagesz*page), pagesz))
+ return pages
+