#!/usr/bin/env ipython
import sys, struct, binascii,time
-from GoodFETARM import *
+from GoodFETARM7 import *
from intelhex import IntelHex
data = []
-client=GoodFETARM();
+client=GoodFETARM7();
def init():
#Initailize FET and set baud rate
+ print >>sys.stderr,"Connecting to goodfet..."
client.serInit()
#
#Connect to target
+ print >>sys.stderr,"Setting up JTAG ARM on goodfet..."
client.setup()
+ print >>sys.stderr,"Starting JTAG ARM on goodfet...\n\n"
client.start()
- print "STARTUP: "+repr(client.data)
+ print "STARTUP: %s\n"%repr(client.data)
#
+def print_registers():
+ return [ hex(client.ARMget_register(x)) for x in range(15) ]
+
+def regwratchet(num,hi=13,lo=0):
+ for x in xrange(lo,hi+1):
+ client.ARMset_register(x,num)
+
+def test():
+ print "ARM JTAG Test Unit"
+ print " Chip ID", hex(client.ARMident())
+ print client.ARMidentstr()
+ print " Debug State: ",hex(client.ARMget_dbgstate())
+ print " Debug CTRL: ",hex(client.ARMget_dbgctrl())
+ print
+ print "Testing Register Read/Writes"
+ print " Storing old values"
+ originalregs = [client.ARMget_register(x) for x in xrange(16)]
+
+ print "Simple test"
+ test = [None for x in xrange(15)]
+ control = [x for x in xrange(15)]
+ for x in xrange(15):
+ client.ARMset_register(x,control[x])
+ test[x] = client.ARMget_register(x)
+ if control != test:
+ print "FAIL"
+ print "Control:",control
+ print "Test: ",test
+
+ print "A little harder..."
+ test = [None for x in xrange(15)]
+ control = [4*x for x in xrange(15)]
+ for x in xrange(15):
+ client.ARMset_register(x,control[x])
+ test[x] = client.ARMget_register(x)
+ if control != test:
+ print "FAIL"
+ print "Control:",control
+ print "Test: ",test
+
+ print "Complex testing 1"
+ for y in xrange(0,0xffffffff,0x10101010):
+ test = [None for x in xrange(15)]
+ control = [y for x in xrange(15)]
+ print " Test parms: ",control
+ for x in xrange(15):
+ client.ARMset_register(x,control[x])
+ test[x] = client.ARMget_register(x)
+ if control != test:
+ print "FAIL"
+ print "Control:",control
+ print "Test: ",test
+
+ print "Complex testing 2"
+ for y in xrange(0,0xffffffff,101010101):
+ test = [None for x in xrange(15)]
+ control = [y for x in xrange(15)]
+ print " Test parms: ",control
+ for x in xrange(15):
+ client.ARMset_register(x,control[x])
+ test[x] = client.ARMget_register(x)
+ if control != test:
+ print "FAIL"
+ print "Control:",control
+ print "Test: ",test
+
+ test = [None for x in xrange(15)]
+ control = [0x100*x for x in xrange(15)]
+ for x in xrange(15):
+ client.ARMset_register(x,control[x])
+ test[x] = client.ARMget_register(x)
+ if control != test:
+ print "FAIL"
+ print "Control:",control
+ print "Test: ",test
+
+ print "Resetting original register values..."
+ for x in xrange(16):
+ client.ARMset_register(x,originalregs[x])
+ regs = [client.ARMget_register(x) for x in xrange(16)]
+ print "Original: \t",originalregs
+ print "Now (r15 may differ:\t",regs
+
+ print "Testing setting and movement of PC between instructions"
+ #client.ARMsetPC(0x0)
+ print "PC:",client.ARMgetPC()
+ print "PC:",client.ARMgetPC()
+ print "PC:",client.ARMgetPC()
+ print "PC:",client.ARMgetPC()
+ print "Testing readChunk/writeChunk"
+ mem=client.ARMreadChunk(0x200000,32)
+ client.ARMwriteChunk(0x200000,mem)
+ mem2=client.ARMreadChunk(0x200000,32)
+ if (mem != mem2):
+ print "Failed: \n%s\n%s"%(repr([hex(x) for x in mem]), repr([hex(x) for x in mem2]))
+ else:
+ print "Passed."
+
+
def test1():
global data
print "\n\nTesting JTAG for ARM\n"
print "Debug State: %x"%client.ARMget_dbgstate ()
seed += 1
-def test7(start=0,end=15):
+def test7(start=0,end=14):
global results,seed
results = [[] for x in range(end)]
while True:
#print "IDCODE: %x"%client.ARMident()
#print "Debug State: %x"%client.ARMget_dbgstate ()
- for x in range(end,start, -1):
+ for x in range(end,start-1, -1):
num = client.ARMset_register(x,seed+x)
time.sleep(1)
print "set_register(%d,0x%x): %x"%(x,seed+x,num)
+ for y in range(10):
+ for x in range(start,endi+1):
+ num = client.ARMget_register(x)
+ time.sleep(1)
+ print "get_register(%d): %x"%(x,num)
+ results[x].append(num)
+ seed += 1
+
+def readtest(start=0,end=14):
+ global results,seed
+ results = [[] for x in range(end)]
+ while True:
+ #print "IDCODE: %x"%client.ARMident()
+ #print "Debug State: %x"%client.ARMget_dbgstate ()
+ for x in range(end,start, -1):
+ num = client.ARMget_register(x)
+ time.sleep(1)
+ print "get_register(%d): %x"%(x,num)
for y in range(10):
for x in range(start,end,2):
num = client.ARMget_register(x)
seed += 1
init()
-print "Don't forget to 'client.stop()' if you want to exit cleanly"
def printResults():
x=results[y]
print "%.2x=%s"%(y,repr(["%x"%t for t in x]))
+def ARMreadMem(self, adr, wrdcount):
+ retval = []
+ r0 = self.ARMget_register(5); # store R0 and R1
+ r1 = self.ARMget_register(9);
+ #print >>sys.stderr,("CPSR:\t%x"%self.ARMget_regCPSR())
+ for word in range(adr, adr+(wrdcount*4), 4):
+ #sys.stdin.readline()
+ self.ARMset_register(5, word); # write address into R0
+ self.ARMset_register(9, 0xdeadbeef)
+ self.ARM_nop(0)
+ self.ARM_nop(1)
+ self.ARMdebuginstr(0xe4959004L, 0); # push LDR R1, [R0], #4 into instruction pipeline (autoincrements for consecutive reads)
+ self.ARM_nop(0)
+ self.ARMrestart()
+ self.ARMwaitDBG()
+ time.sleep(.4)
+ self.ARMdebuginstr(0x47146,0)
+ self.ARMdebuginstr(0x47147,0)
+ print hex(self.ARMget_register(9))
+ # FIXME: this may end up changing te current debug-state. should we compare to current_dbgstate?
+ #print repr(self.data[4])
+ if (len(self.data)>4 and self.data[4] == '\x00'):
+ print >>sys.stderr,("FAILED TO READ MEMORY/RE-ENTER DEBUG MODE")
+ raise Exception("FAILED TO READ MEMORY/RE-ENTER DEBUG MODE")
+ #return -1
+ else:
+ retval.append( self.ARMget_register(9) ) # read memory value from R1 register
+ #print >>sys.stderr,("CPSR: %x\t\tR0: %x\t\tR1: %x"%(self.ARMget_regCPSR(),self.ARMget_register(0),self.ARMget_register(1)))
+ self.ARMset_register(9, r1); # restore R0 and R1
+ self.ARMset_register(5, r0);
+ return retval
+
"""
case 0xD0: // loopback test
cmddatalong[0] = 0x12345678;
projects / goodfet / blobdiff