Some Chipcon devices have a resistor and capacitor on the !RST line.

[goodfet] / firmware / apps / chipcon / chipcon.c

diff --git a/firmware/apps/chipcon/chipcon.c b/firmware/apps/chipcon/chipcon.c
index c2b7838..28bc52b 100644 (file)
--- a/firmware/apps/chipcon/chipcon.c
+++ b/firmware/apps/chipcon/chipcon.c
@@ -34,11 +34,12 @@
 #define MISO BIT2
 #define SCK  BIT3
 
+
 //This could be more accurate.
 //Does it ever need to be?
 #define CCSPEED 3
-//#define CCDELAY(x) delay(x)
-#define CCDELAY(x) 
+#define CCDELAY(x) delay(x)
+//#define CCDELAY(x) 
 
 #define SETMOSI P5OUT|=MOSI
 #define CLRMOSI P5OUT&=~MOSI
@@ -82,14 +83,21 @@ void ccdebuginit(){
   //Two positive debug clock pulses while !RST is low.
   //Take RST low, pulse twice, then high.
   P5OUT&=~SCK;
+  delay(10);
   P5OUT&=~RST;
   
+  delay(10);
+  
   //Two rising edges.
   P5OUT^=SCK; //up
+  delay(1);
   P5OUT^=SCK; //down
+  delay(1);
   P5OUT^=SCK; //up
+  delay(1);
   P5OUT^=SCK; //Unnecessary.
-  
+  delay(1);
+  //delay(0);
   
   //Raise !RST.
   P5OUT|=RST;
@@ -255,7 +263,7 @@ void cchandle(unsigned char app,
     //Return that many bytes.
     for(i=0;i<blocklen;i++)
       cmddata[i]=cc_peekdatabyte(blockadr+i);
-    txdata(app,verb,1);
+    txdata(app,verb,blocklen);
     break;
     
   case CC_WRITE_XDATA_MEMORY: