#include <io.h>
#include <iomacros.h>
+//! Handles a chipcon command.
+void cc_handle_fn( uint8_t const app,
+ uint8_t const verb,
+ uint32_t const len);
+
+// define the jtag app's app_t
+app_t const chipcon_app = {
+
+ /* app number */
+ CHIPCON,
+
+ /* handle fn */
+ cc_handle_fn,
+
+ /* name */
+ "CHIPCON",
+
+ /* desc */
+ "\tThe CHIPCON app adds support for debugging the chipcon\n"
+ "\t8051 processor.\n"
+};
/* Concerning clock rates, the maximimum clock rates are defined on
page 4 of the spec. They vary, but are roughly 30MHz. Raising
#define MISO BIT2
#define SCK BIT3
+
//This could be more accurate.
//Does it ever need to be?
#define CCSPEED 3
+//#define CCSPEED 3
//#define CCDELAY(x) delay(x)
#define CCDELAY(x)
-#define SETMOSI P5OUT|=MOSI
-#define CLRMOSI P5OUT&=~MOSI
-#define SETCLK P5OUT|=SCK
-#define CLRCLK P5OUT&=~SCK
-#define READMISO (P5IN&MISO?1:0)
+#define SETMOSI SPIOUT|=MOSI
+#define CLRMOSI SPIOUT&=~MOSI
+#define SETCLK SPIOUT|=SCK
+#define CLRCLK SPIOUT&=~SCK
+#define READMISO (SPIIN&MISO?1:0)
-#define CCWRITE P5DIR|=MOSI
-#define CCREAD P5DIR&=~MISO
+#define CCWRITE SPIDIR|=MOSI
+#define CCREAD SPIDIR&=~MISO
//! Set up the pins for CC mode. Does not init debugger.
void ccsetup(){
- P5OUT|=MOSI+SCK+RST;
- P5DIR|=MOSI+SCK+RST;
+ SPIOUT|=MOSI+SCK+RST;
+ SPIDIR|=MOSI+SCK+RST;
//P5REN=0xFF;
}
+
+/* 33 cycle critical region
+0000000e <ccdebuginit>:
+ e: f2 d0 0d 00 bis.b #13, &0x0031 ;5 cycles
+ 12: 31 00
+ 14: f2 c2 31 00 bic.b #8, &0x0031 ;4 cycles
+ 18: d2 c3 31 00 bic.b #1, &0x0031 ;4
+ 1c: f2 e2 31 00 xor.b #8, &0x0031 ;4
+ 20: f2 e2 31 00 xor.b #8, &0x0031 ;4
+ 24: f2 e2 31 00 xor.b #8, &0x0031 ;4
+ 28: f2 e2 31 00 xor.b #8, &0x0031 ;4
+ 2c: d2 d3 31 00 bis.b #1, &0x0031 ;4
+ 30: 30 41 ret
+*/
+
+
//! Initialize the debugger
void ccdebuginit(){
//Port output BUT NOT DIRECTION is set at start.
- P5OUT|=MOSI+SCK+RST;
+ SPIOUT|=MOSI+SCK+RST;
- //delay(30); //So the beginning is ready for glitching.
+ delay(30); //So the beginning is ready for glitching.
//Two positive debug clock pulses while !RST is low.
//Take RST low, pulse twice, then high.
- P5OUT&=~SCK;
- P5OUT&=~RST;
+ SPIOUT&=~SCK;
+ delay(10);
+ SPIOUT&=~RST;
- //Two rising edges.
- P5OUT^=SCK; //up
- P5OUT^=SCK; //down
- P5OUT^=SCK; //up
- P5OUT^=SCK; //Unnecessary.
+ delay(10);
+ //Two rising edges.
+ SPIOUT^=SCK; //up
+ delay(1);
+ SPIOUT^=SCK; //down
+ delay(1);
+ SPIOUT^=SCK; //up
+ delay(1);
+ SPIOUT^=SCK; //Unnecessary.
+ delay(1);
+ //delay(0);
//Raise !RST.
- P5OUT|=RST;
+ SPIOUT|=RST;
}
//! Read and write a CC bit.
byte <<= 1;
/* half a clock cycle before leading/rising edge */
- CCDELAY(CCSPEED/2);
+ CCDELAY(CCSPEED>>2);
SETCLK;
/* half a clock cycle before trailing/falling edge */
- CCDELAY(CCSPEED/2);
+ CCDELAY(CCSPEED>>2);
/* read MISO on trailing edge */
byte |= READMISO;
cmddata[i]=cctrans8(0);
}
-//! Handles a monitor command.
-void cchandle(unsigned char app,
- unsigned char verb,
- unsigned long len){
+//! Handles a chipcon command.
+void cc_handle_fn( uint8_t const app,
+ uint8_t const verb,
+ uint32_t const len)
+{
//Always init. Might help with buggy lines.
//Might hurt too.
//ccdebuginit();
long i;
+ int blocklen, blockadr;
switch(verb){
//CC_PEEK and CC_POKE will come later.
break;
case STOP://exit debugger
//Take RST low, then high.
- P5OUT&=~RST;
+ SPIOUT&=~RST;
CCDELAY(CCSPEED);
- P5OUT|=RST;
+ SPIOUT|=RST;
txdata(app,verb,0);
break;
case SETUP:
//Micro commands!
case CC_CHIP_ERASE:
+ case CC_MASS_ERASE_FLASH:
cc_chip_erase();
txdata(app,verb,1);
break;
txdata(app,verb,1);
break;
case CC_STEP_REPLACE:
- txdata(app,NOK,0);//TODO add me
+ txdata(app,NOK,0);//Don't add this; it's non-standard.
break;
case CC_GET_CHIP_ID:
cmddataword[0]=cc_get_chip_id();
txdata(app,verb,1);
break;
case CC_READ_XDATA_MEMORY:
- cmddata[0]=cc_peekdatabyte(cmddataword[0]);
- txdata(app,verb,1);
+ //Read the length.
+ blocklen=1;
+ if(len>2)
+ blocklen=cmddataword[1];
+ blockadr=cmddataword[0];
+
+ //Return that many bytes.
+ for(i=0;i<blocklen;i++)
+ cmddata[i]=cc_peekdatabyte(blockadr+i);
+ txdata(app,verb,blocklen);
break;
+
case CC_WRITE_XDATA_MEMORY:
cmddata[0]=cc_pokedatabyte(cmddataword[0], cmddata[2]);
txdata(app,verb,1);
cc_pokedatabyte(i,0xFF);
txdata(app,verb,0);
break;
- case CC_MASS_ERASE_FLASH:
+
case CC_CLOCK_INIT:
case CC_PROGRAM_FLASH:
+ default:
debugstr("This Chipcon command is not yet implemented.");
txdata(app,NOK,0);//TODO implement me.
break;
//Find the flash word size.
switch(cmddata[0]){
case 0x01://CC1110
+ case 0x11://CC1111
case 0x81://CC2510
case 0x91://CC2511
- flash_word_size=0x02;
//debugstr("2 bytes/flash word");
+ flash_word_size=0x02;
break;
default:
- debugstr("Warning: Guessing flash word size.");
+ //debugstr("Warning: Guessing flash word size.");
+ //flash_word_size=0;
+ break;
case 0x85://CC2430
case 0x89://CC2431
//debugstr("4 bytes/flash word");
return;
}
- if(flash_word_size==0){
- debugstr("Flash word size is wrong.");
+ if(flash_word_size!=2 && flash_word_size!=4){
+ debugstr("Flash word size is wrong, aborting write to");
+ debughex(adr);
while(1);
}
flash_word_size);
//debugstr("Wrote flash routine.");
-
-
+
//MOV MEMCTR, (bank * 16) + 1;
cmddata[0]=0x75;
cmddata[1]=0xc7;
while(!(cc_read_status()&CC_STATUS_CPUHALTED)){
- P1OUT^=1;//blink LED while flashing
+ PLEDOUT^=PLEDPIN;//blink LED while flashing
}
//debugstr("Done flashing.");
- P1OUT&=~1;//clear LED
+ PLEDOUT&=~PLEDPIN;//clear LED
}
//! Read the PC
projects / goodfet / blobdiff