Beginning support for the second UART.

[goodfet] / firmware / apps / chipcon / chipcon.c

diff --git a/firmware/apps/chipcon/chipcon.c b/firmware/apps/chipcon/chipcon.c
index d4e8177..ad701be 100644 (file)
--- a/firmware/apps/chipcon/chipcon.c
+++ b/firmware/apps/chipcon/chipcon.c
@@ -1,7 +1,7 @@
 //GoodFET ChipCon Debugging Application
 //GoodFET ChipCon Debugging Application

-//Handles basic I/O for the Chipcon 8051 debugging protocol.
+//by Travis Goodspeed
+//<travis at radiantmachines.com>

 
 

-//Higher level left to client application.

 
 //This is like SPI, except that you read or write, not both.
 
 
 //This is like SPI, except that you read or write, not both.
 


@@ -10,8 +10,6 @@
     only writes.
 */
 
     only writes.
 */
 

-//This is REALLY untested.
-

 #include "platform.h"
 #include "command.h"
 #include "chipcon.h"
 #include "platform.h"
 #include "command.h"
 #include "chipcon.h"


@@ -217,7 +215,6 @@ void cchandle(unsigned char app,
     txdata(app,verb,1);
     break;
   case CC_SET_PC:
     txdata(app,verb,1);
     break;
   case CC_SET_PC:

-    

   case CC_CLOCK_INIT:
   case CC_WRITE_FLASH_PAGE:
   case CC_MASS_ERASE_FLASH:
   case CC_CLOCK_INIT:
   case CC_WRITE_FLASH_PAGE:
   case CC_MASS_ERASE_FLASH:


@@ -362,7 +359,7 @@ unsigned char cc_peekcodebyte(unsigned long adr){
   //CLR A
   cc_debug(2, 0xE4, 0, 0);
   //MOVC A, @A+DPTR;
   //CLR A
   cc_debug(2, 0xE4, 0, 0);
   //MOVC A, @A+DPTR;

-  toret=cc_debug(1, 0x93, 0, 0);
+  toret=cc_debug(3, 0x93, 0, 0);

   //INC DPTR
   //cc_debug(1, 0xA3, 0, 0);
   
   //INC DPTR
   //cc_debug(1, 0xA3, 0, 0);