void ccsetup(){
P5OUT|=MOSI+SCK+RST;
P5DIR|=MOSI+SCK+RST;
- //P5DIR&=~MISO; //MOSI is MISO
-
//P5REN=0xFF;
-
}
+
+/* 33 cycle critical region
+0000000e <ccdebuginit>:
+ e: f2 d0 0d 00 bis.b #13, &0x0031 ;5 cycles
+ 12: 31 00
+ 14: f2 c2 31 00 bic.b #8, &0x0031 ;4 cycles
+ 18: d2 c3 31 00 bic.b #1, &0x0031 ;4
+ 1c: f2 e2 31 00 xor.b #8, &0x0031 ;4
+ 20: f2 e2 31 00 xor.b #8, &0x0031 ;4
+ 24: f2 e2 31 00 xor.b #8, &0x0031 ;4
+ 28: f2 e2 31 00 xor.b #8, &0x0031 ;4
+ 2c: d2 d3 31 00 bis.b #1, &0x0031 ;4
+ 30: 30 41 ret
+*/
+
+/*
//! Initialize the debugger
void ccdebuginit(){
- delay(30); //So the beginning is ready for glitching.
+ //Port output BUT NOT DIRECTION is set at start.
+ P5OUT|=MOSI+SCK+RST;
+
+ //delay(30); //So the beginning is ready for glitching.
//Two positive debug clock pulses while !RST is low.
//Take RST low, pulse twice, then high.
P5OUT&=~SCK;
P5OUT&=~RST;
- /*
- //pulse twice, old code.
- CCDELAY(CCSPEED);
- P5OUT|=SCK; //up
- CCDELAY(CCSPEED);
- P5OUT&=~SCK; //down
- CCDELAY(CCSPEED);
-
- P5OUT|=SCK; //up
- CCDELAY(CCSPEED);
- P5OUT&=~SCK; //down
- CCDELAY(CCSPEED);
- */
-
- P5OUT^=SCK;
- P5OUT^=SCK;
- P5OUT^=SCK;
+ //Two rising edges.
+ P5OUT^=SCK; //up
+ P5OUT^=SCK; //down
+ P5OUT^=SCK; //up
P5OUT^=SCK; //Unnecessary.
//Raise !RST.
P5OUT|=RST;
}
+*/
+
+//! Initialize the debugger.
+void ccdebuginit();
//! Read and write a CC bit.
unsigned char cctrans8(unsigned char byte){
if(cmddata[0]&0x4)
ccread(1);
txdata(app,verb,1);
-
break;
case WRITE: //Write a command with no reply.
cccmd(len);
txdata(app,verb,0);
break;
case START://enter debugger
- ccsetup();
ccdebuginit();
txdata(app,verb,0);
break;