TACTL|=TACLR; //Clear TimerA Config
TACTL|=
TASSEL_SMCLK | //SMCLK source,
- MC_1; //Count up to CCR0
- //TAIE; //Enable Interrupt
+ MC_1 | //Count up to CCR0
+ TAIE; //Enable Interrupt
CCTL0 = CCIE; // CCR0 interrupt enabled
CCR0 = glitchcount;
//Set GSEL high to disable glitching.
P5DIR|=0x80;
- P6DIR|=0x40;
+ P6DIR|=BIT6+BIT5;
P5OUT|=0x80;
- P6OUT|=0x40;
+ P6OUT|=BIT6+BIT5;
glitchsetupdac();
asm("nop");
asm("nop");
DAC12_0DAT = glitchH;
- //DAC12_0DAT = glitchL;
- /*
- switch(glitchstate){
- case 0:
- P1OUT|=1;
- glitchstate=1;
- DAC12_0DAT = glitchH;
- break;
- case 1:
- P1OUT|=1;
- glitchstate=0;
- DAC12_0DAT = glitchL;
- break;
- default:
- P1OUT&=~1;
- //Do nothing.
- break;
- }
- */
#endif
+ TACTL |= MC0; // Stop Timer_A;
}
// Delay here for reference to settle.
for(i=0;i!=0xFFFF;i++) asm("nop");
DAC12_0CTL = DAC12IR + DAC12AMP_5 + DAC12ENC; // Int ref gain 1
+ DAC12_1CTL = DAC12IR + DAC12AMP_5 + DAC12ENC; // Int ref gain 1
// 1.0V 0x0666, 2.5V 0x0FFF
DAC12_0DAT = high;
- //DAC12_0DAT = 0x0880;
+ DAC12_1DAT = low;
#endif
}
//! Set glitching rate.
txdata(app,verb,2);
break;
case START:
+ glitchvoltages(0xFFF,0);//Inverted VCC and GND.
+ P5OUT|=BIT7;//Normal
+ P5DIR|=BIT7;
+ while(1){
+ P5OUT&=~BIT7;//Glitch
+ //asm("nop");//asm("nop");asm("nop");asm("nop");asm("nop");asm("nop");
+ asm("nop");
+ P5OUT|=BIT7;//Normal
+ asm("nop");asm("nop");asm("nop");asm("nop");asm("nop");asm("nop");
+ asm("nop");asm("nop");asm("nop");asm("nop");asm("nop");asm("nop");
+ }
+ txdata(app,verb,0);
+ break;
case STOP:
case GLITCHAPP:
default: