void jtag_reset_target()
{
SETRST;
- PLEDOUT^=PLEDPIN;
+ led_toggle();
CLRRST;
- PLEDOUT^=PLEDPIN;
+ led_toggle();
}
//! Clock the JTAG clock line
void jtag_tcktock()
{
CLRTCK;
- PLEDOUT^=PLEDPIN;
+ led_toggle();
SETTCK;
- PLEDOUT^=PLEDPIN;
+ led_toggle();
}
//! Goes through test-logic-reset and ends in run-test-idle
// subsystem does not want to return to the RUN-TEST/IDLE state between
// setting IR and DR
uint32_t jtag_trans_n(uint32_t word,
- uint8_t bitcount,
- enum eTransFlags flags)
+ uint8_t bitcount,
+ enum eTransFlags flags)
{
uint8_t bit;
uint32_t high = (1L << (bitcount - 1));
word |= (READMISO);
}
}
-
+
+ //This is needed for 20-bit MSP430 chips.
+ //Might break another 20-bit chip, if one exists.
+ if(bitcount==20){
+ word = ((word << 16) | (word >> 4)) & 0x000FFFFF;
+ }
+
RESTORETCLK;
if (!(flags & NOEND))
//! Shift 8 bits of the IR.
uint8_t jtag_ir_shift_8(uint8_t in)
{
+ /* Huseby's code, which breaks MSP430 support.
+ The code is broken because either the invalid jtag state error
+ causes the client to give up, or because it adds an extra clock edge.
+
if (!in_run_test_idle())
{
debugstr("Not in run-test-idle state");
// get intot the right state
jtag_capture_ir();
jtag_shift_register();
-
- // shift IR bits
- return jtag_trans_8(in);
+ */
+
+
+
+ // idle
+ SETTMS;
+ jtag_tcktock();
+ // select DR
+ jtag_tcktock();
+ // select IR
+ CLRTMS;
+ jtag_tcktock();
+ // capture IR
+ jtag_tcktock();
+ //jtag_state = CAPTURE_IR;
+ jtag_state = SHIFT_IR;
+ // shift IR bits
+ return jtag_trans_8(in);
}
//! Shift 16 bits of the DR.