Now compiling with -Wall, error free.

[goodfet] / firmware / apps / jtag / jtag430.c

diff --git a/firmware/apps/jtag/jtag430.c b/firmware/apps/jtag/jtag430.c
index cc2ecc2..123eefa 100644 (file)
--- a/firmware/apps/jtag/jtag430.c
+++ b/firmware/apps/jtag/jtag430.c
@@ -79,30 +79,30 @@ void jtag430_writemem(unsigned int adr, unsigned int data){
   SETTCLK;
 }
 
-//! Pulse TCLK at 350kHz +/- 100kHz
-void jtag430_tclk_flashpulses(unsigned int i){
-  //TODO check this on a scope.
+//! Defined in jtag430asm.S
+void jtag430_tclk_flashpulses(int);
+/* //! Pulse TCLK at 350kHz +/- 100kHz */
+/* void jtag430_tclk_flashpulses(register i){ */
+/*   //TODO check this on a scope. */
+/*   register j=0; */
   
-  //At 2MHz, 350kHz is obtained with 5 clocks of delay
+/*   //At 2MHz, 350kHz is obtained with 5 clocks of delay */
   
-  /** Pondering:
-      What happens if the frequency is too low or to high?
-      Is there any risk of damaging the chip, or only of a poor write?
-  */
-  while(i--){
-    SETTCLK;
-    _NOP();
-    _NOP();
-    _NOP();
-    _NOP();
-    _NOP();
-    CLRTCLK;
-  }
-}
+/*   /\** Pondering: */
+/*       What happens if the frequency is too low or to high? */
+/*       Is there any risk of damaging the chip, or only of a poor write? */
+/*   *\/ */
+/*   while(j++!=i){ */
+/*     SETTCLK; */
+/*     _NOP(); */
+/*     _NOP(); */
+/*     _NOP(); */
+/*     CLRTCLK; */
+/*   } */
+/* } */
 
 //! Write data to flash memory.  Must be preconfigured.
 void jtag430_writeflashword(unsigned int adr, unsigned int data){
-  //jtag430_haltcpu();
   /*
   CLRTCLK;
   jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
@@ -124,10 +124,9 @@ void jtag430_writeflashword(unsigned int adr, unsigned int data){
   jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
   jtag_dr_shift16(0x2409);
   
-  
   //Pulse TCLK
-  jtag430_tclk_flashpulses(35);
-  //jtag430_releasecpu();
+  jtag430_tclk_flashpulses(35); //35 standard
+  
 }
 
 //! Configure flash, then write a word.
@@ -150,6 +149,25 @@ void jtag430_writeflash(unsigned int adr, unsigned int data){
   jtag430_releasecpu();
 }
 
+//! Power-On Reset
+void jtag430_por(){
+  unsigned int jtagid;
+
+  // Perform Reset
+  jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
+  jtag_dr_shift16(0x2C01); // apply
+  jtag_dr_shift16(0x2401); // remove
+  CLRTCLK;
+  SETTCLK;
+  CLRTCLK;
+  SETTCLK;
+  CLRTCLK;
+  jtagid = jtag_ir_shift8(IR_ADDR_CAPTURE); // get JTAG identifier
+  SETTCLK;
+  
+  jtag430_writemem(0x0120, 0x5A80);   // Diabled Watchdog
+}
+
 
 
 #define ERASE_GLOB 0xA50E
@@ -160,6 +178,8 @@ void jtag430_writeflash(unsigned int adr, unsigned int data){
 
 //! Configure flash, then write a word.
 void jtag430_eraseflash(unsigned int mode, unsigned int adr, unsigned int count){
+  jtag430_haltcpu();
+  
   //FCTL1= erase mode
   jtag430_writemem(0x0128, mode);
   //FCTL2=0xA540, selecting MCLK as source, DIV=1
@@ -179,6 +199,8 @@ void jtag430_eraseflash(unsigned int mode, unsigned int adr, unsigned int count)
   
   //FCTL1=0xA500, disabling flash write
   jtag430_writemem(0x0128, 0xA500);
+  
+  jtag430_releasecpu();
 }
 
 
@@ -238,6 +260,9 @@ void jtag430_start(){
   SETRST;
   P5DIR&=~RST;
   delay(0xFFFF);
+  
+  //Perform a reset and disable watchdog.
+  jtag430_por();
 }
 
 //! Set CPU to Instruction Fetch
@@ -257,7 +282,6 @@ void jtag430_setinstrfetch(){
 void jtag430handle(unsigned char app,
                   unsigned char verb,
                   unsigned char len){
-  unsigned char i;
   switch(verb){
   case START:
     //Enter JTAG mode.
@@ -297,6 +321,8 @@ void jtag430handle(unsigned char app,
     txdata(app,verb,2);
     break;
   case JTAG430_ERASEFLASH:
+    jtag430_eraseflash(ERASE_MASS,0xFFFE,0xFFFF);
+    jtag430_eraseflash(ERASE_MASS,0xFFFE,0xFFFF);
     jtag430_eraseflash(ERASE_MASS,0xFFFE,0xFFFF);
     txdata(app,verb,0);
     break;