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goodfet.msp430 selftest is working!
[goodfet]
/
firmware
/
apps
/
jtag
/
jtag430.c
diff --git
a/firmware/apps/jtag/jtag430.c
b/firmware/apps/jtag/jtag430.c
index
22687da
..
5a8da9a
100644
(file)
--- a/
firmware/apps/jtag/jtag430.c
+++ b/
firmware/apps/jtag/jtag430.c
@@
-51,9
+51,14
@@
void jtag430_haltcpu(){
//! Release the CPU
void jtag430_releasecpu(){
CLRTCLK;
//! Release the CPU
void jtag430_releasecpu(){
CLRTCLK;
+ debugstr("Releasing target MSP430.");
+
+ /*
jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
- jtag_dr_shift16(0x2401);
- jtag_ir_shift8(IR_ADDR_CAPTURE);
+ jtag_dr_shift16(0x2C01); //Apply reset.
+ jtag_dr_shift16(0x2401); //Release reset.
+ */
+ jtag_ir_shift8(IR_CNTRL_SIG_RELEASE);
SETTCLK;
}
SETTCLK;
}
@@
-70,7
+75,7
@@
unsigned int jtag430_readmem(unsigned int adr){
else
jtag_dr_shift16(0x2419);//byte read
jtag_ir_shift8(IR_ADDR_16BIT);
else
jtag_dr_shift16(0x2419);//byte read
jtag_ir_shift8(IR_ADDR_16BIT);
- jtag_dr_shift
16
(adr);//address
+ jtag_dr_shift
adr
(adr);//address
jtag_ir_shift8(IR_DATA_TO_ADDR);
SETTCLK;
jtag_ir_shift8(IR_DATA_TO_ADDR);
SETTCLK;
@@
-89,7
+94,7
@@
void jtag430_writemem(unsigned int adr, unsigned int data){
else
jtag_dr_shift16(0x2418);//byte write
jtag_ir_shift8(IR_ADDR_16BIT);
else
jtag_dr_shift16(0x2418);//byte write
jtag_ir_shift8(IR_ADDR_16BIT);
- jtag_dr_shift
16
(adr);
+ jtag_dr_shift
adr
(adr);
jtag_ir_shift8(IR_DATA_TO_ADDR);
jtag_dr_shift16(data);
SETTCLK;
jtag_ir_shift8(IR_DATA_TO_ADDR);
jtag_dr_shift16(data);
SETTCLK;
@@
-102,7
+107,7
@@
void jtag430_writeflashword(unsigned int adr, unsigned int data){
jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
jtag_dr_shift16(0x2408);//word write
jtag_ir_shift8(IR_ADDR_16BIT);
jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
jtag_dr_shift16(0x2408);//word write
jtag_ir_shift8(IR_ADDR_16BIT);
- jtag_dr_shift
16
(adr);
+ jtag_dr_shift
adr
(adr);
jtag_ir_shift8(IR_DATA_TO_ADDR);
jtag_dr_shift16(data);
SETTCLK;
jtag_ir_shift8(IR_DATA_TO_ADDR);
jtag_dr_shift16(data);
SETTCLK;
@@
-133,6
+138,7
@@
void jtag430_writeflash(unsigned int adr, unsigned int data){
jtag430_writemem(0x012A, 0xA540);
//FCTL3=0xA500, should be 0xA540 for Info Seg A on 2xx chips.
jtag430_writemem(0x012C, 0xA500); //all but info flash.
jtag430_writemem(0x012A, 0xA540);
//FCTL3=0xA500, should be 0xA540 for Info Seg A on 2xx chips.
jtag430_writemem(0x012C, 0xA500); //all but info flash.
+ //if(jtag430_readmem(0x012C));
//Write the word itself.
jtag430_writeflashword(adr,data);
//Write the word itself.
jtag430_writeflashword(adr,data);
@@
-173,7
+179,8
@@
void jtag430_por(){
#define ERASE_SGMT 0xA502
//! Configure flash, then write a word.
#define ERASE_SGMT 0xA502
//! Configure flash, then write a word.
-void jtag430_eraseflash(unsigned int mode, unsigned int adr, unsigned int count){
+void jtag430_eraseflash(unsigned int mode, unsigned int adr, unsigned int count,
+ unsigned int info){
jtag430_haltcpu();
//FCTL1= erase mode
jtag430_haltcpu();
//FCTL1= erase mode
@@
-181,7
+188,10
@@
void jtag430_eraseflash(unsigned int mode, unsigned int adr, unsigned int count)
//FCTL2=0xA540, selecting MCLK as source, DIV=1
jtag430_writemem(0x012A, 0xA540);
//FCTL3=0xA500, should be 0xA540 for Info Seg A on 2xx chips.
//FCTL2=0xA540, selecting MCLK as source, DIV=1
jtag430_writemem(0x012A, 0xA540);
//FCTL3=0xA500, should be 0xA540 for Info Seg A on 2xx chips.
- jtag430_writemem(0x012C, 0xA500);
+ if(info)
+ jtag430_writemem(0x012C, 0xA540);
+ else
+ jtag430_writemem(0x012C, 0xA500);
//Write the erase word.
jtag430_writemem(adr, 0x55AA);
//Write the erase word.
jtag430_writemem(adr, 0x55AA);
@@
-245,6
+255,7
@@
void jtag430_start(){
SETRST;
delay(0xFFFF);
SETRST;
delay(0xFFFF);
+
#ifndef SBWREWRITE
//Entry sequence from Page 67 of SLAU265A for 4-wire MSP430 JTAG
CLRRST;
#ifndef SBWREWRITE
//Entry sequence from Page 67 of SLAU265A for 4-wire MSP430 JTAG
CLRRST;
@@
-265,7
+276,7
@@
void jtag430_start(){
jtag430_haltcpu();
}
jtag430_haltcpu();
}
-//! St
art normally, not
JTAG.
+//! St
op
JTAG.
void jtag430_stop(){
debugstr("Exiting JTAG.");
jtagsetup();
void jtag430_stop(){
debugstr("Exiting JTAG.");
jtagsetup();
@@
-318,11
+329,13
@@
void jtag430handle(unsigned char app,
* for testing server.
*/
while((i=jtag430_readmem(0xff0))==0xFFFF){
* for testing server.
*/
while((i=jtag430_readmem(0xff0))==0xFFFF){
+ debugstr("Reconnecting to target MSP430.");
jtag430_start();
P1OUT^=1;
}
P1OUT&=~1;
jtag430_start();
P1OUT^=1;
}
P1OUT&=~1;
-
+
+
switch(verb){
case START:
//Enter JTAG mode.
switch(verb){
case START:
//Enter JTAG mode.
@@
-412,12
+425,19
@@
void jtag430handle(unsigned char app,
txdata(app,verb,2);
break;
case JTAG430_ERASEFLASH:
txdata(app,verb,2);
break;
case JTAG430_ERASEFLASH:
- jtag430_eraseflash(ERASE_MASS,0xFFFE,0x3000);
+ jtag430_eraseflash(ERASE_MASS,0xFFFE,0x3000,0);
+ txdata(app,verb,0);
+ break;
+ case JTAG430_ERASEINFO:
+ jtag430_eraseflash(ERASE_SGMT,0x1000,0x3000,1);
txdata(app,verb,0);
break;
case JTAG430_SETPC:
jtag430_haltcpu();
txdata(app,verb,0);
break;
case JTAG430_SETPC:
jtag430_haltcpu();
+ debughex("Setting PC.");
+ debughex(cmddataword[0]);
jtag430_setpc(cmddataword[0]);
jtag430_setpc(cmddataword[0]);
+ jtag430_releasecpu();
txdata(app,verb,0);
break;
case JTAG430_SETREG:
txdata(app,verb,0);
break;
case JTAG430_SETREG: