#include "jtag430x2.h"
void jtag430x2_handle_fn( uint8_t const app,
- uint8_t const verb,
- uint32_t const len);
+ uint8_t const verb,
+ uint32_t const len);
// define the jtag430x2 app's app_t
app_t const jtag430x2_app = {
-
- /* app number */
- JTAG430X2,
-
- /* handle fn */
- jtag430x2_handle_fn,
-
- /* name */
- "JTAG430X2",
-
- /* desc */
- "\tThe JTAG430X2 app extends the basic JTAG app with support\n"
- "\tfor 20-bit MSP430 devices.\n"
+ /* app number */
+ JTAG430X2,
+
+ /* handle fn */
+ jtag430x2_handle_fn,
+
+ /* name */
+ "JTAG430X2",
+
+ /* desc */
+ "\tThe JTAG430X2 app extends the basic JTAG app with support\n"
+ "\tfor 20-bit MSP430X2 devices, such as the MSP430F5xx Family.\n"
};
+//! Grab the core ID.
+unsigned int jtag430_coreid(){
+ jtag_ir_shift8(IR_COREIP_ID);
+ return jtag_dr_shift16(0);
+}
+
+//! Grab the device ID.
+unsigned long jtag430_deviceid(){
+ jtag_ir_shift8(IR_DEVICE_ID);
+ return jtag_dr_shift20(0);
+}
//! Write data to address
//unsigned int tries=5;
while(1){
- //do{
- jtag_ir_shift8(IR_CNTRL_SIG_CAPTURE);
- //}while(!(jtag_dr_shift16(0) & 0x0301));
+ do{
+ jtag_ir_shift8(IR_CNTRL_SIG_CAPTURE);
+ }while(!(jtag_dr_shift16(0) & 0x0301));
if(jtag_dr_shift16(0) & 0x0301){
// Read Memory
CLRTCLK;
jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
- //if(adr>=0x100){
jtag_dr_shift16(0x0501);//word read
- //}else{
- //jtag_dr_shift16(0x0511);//byte read
- //}
jtag_ir_shift8(IR_ADDR_16BIT);
jtag_dr_shift20(adr); //20
SETTCLK;
return toret;
}
+
+ return 0xdead;
}
//return toret;
}
unsigned int jtag430x2_syncpor(){
jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
jtag_dr_shift16(0x1501); //JTAG mode
- while(!(jtag_dr_shift16(0) & 0x200));
+ while(!(jtag_dr_shift16(0) & 0x200)); //0x100 or 0x200?
return jtag430x2_por();
}
uint8_t const verb,
uint32_t const len)
{
- register char blocks;
-
unsigned int i,val;
unsigned long at, l;
//MSP430 or MSP430X
if(jtagid==MSP430JTAGID){
- debugstr("ERROR, using JTAG430X2 instead of JTAG430!");
+ //debugstr("ERROR, using JTAG430X2 instead of JTAG430!");
+ jtag430mode=MSP430MODE;
+
+ /* So the way this works is that a width of 20 does some
+ backward-compatibility finagling, causing the correct value
+ to be exchanged for addresses on 16-bit chips as well as the
+ new MSP430X chips. (This has only been verified on the
+ MSP430F2xx family. TODO verify for others.)
+ */
+
+ drwidth=20;
+
+ //Perform a reset and disable watchdog.
+ jtag430_por();
+ jtag430_writemem(0x120,0x5a80);//disable watchdog
+
+ jtag430_haltcpu();
+
+ jtag430_resettap();
+ txdata(app,verb,1);
+
return;
}else if(jtagid==MSP430X2JTAGID){
jtag430mode=MSP430X2MODE;
return;
}
+
+
jtag430x2_fusecheck();
jtag430x2_syncpor();
break;
case JTAG430_READMEM:
case PEEK:
- blocks=(len>4?cmddata[4]:1);
at=cmddatalong[0];
- l=0x80;
- txhead(app,verb,l);
+ //Fetch large blocks for bulk fetches,
+ //small blocks for individual peeks.
+ if(len>5)
+ l=(cmddataword[2]);//always even.
+ else
+ l=2;
+ l&=~1;//clear lsbit
- while(blocks--){
- for(i=0;i<l;i+=2){
- jtag430_resettap();
- delay(10);
-
- val=jtag430x2_readmem(at);
-
- at+=2;
- serial_tx(val&0xFF);
- serial_tx((val&0xFF00)>>8);
- }
+ if(l<2) l=2;
+
+ txhead(app,verb,l);
+ for(i=0;i<l;i+=2){
+ //jtag430_resettap();
+ //delay(10);
+
+ val=jtag430x2_readmem(at);
+
+ at+=2;
+ serial_tx(val&0xFF);
+ serial_tx((val&0xFF00)>>8);
}
break;
break;
//unimplemented functions
- case JTAG430_HALTCPU:
+ case JTAG430_HALTCPU:
+ //jtag430x2_haltcpu();
+ debugstr("Warning, not trying to halt for lack of code.");
+ txdata(app,verb,0);
+ break;
case JTAG430_RELEASECPU:
case JTAG430_SETINSTRFETCH: