- if(jtag_dr_shift16(0) & 0x0301){
- // MOVA #imm20, PC
- CLRTCLK;
- // take over bus control during clock LOW phase
- jtag_ir_shift8(IR_DATA_16BIT);
- SETTCLK;
- jtag_dr_shift16(Mova);
- jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
- jtag_dr_shift16(0x1400);
- jtag_ir_shift8(IR_DATA_16BIT);
- CLRTCLK;
- SETTCLK;
- jtag_dr_shift16(Pc_l);
- CLRTCLK;
- SETTCLK;
- jtag_dr_shift16(0x4303);
- CLRTCLK;
- jtag_ir_shift8(IR_ADDR_CAPTURE);
- jtag_dr_shift20(0x00000);
+ if(jtag_ir_shift8(0) & 0x0301){
+ CLRTCLK;
+ jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
+ if(adr>=0x100)
+ jtag_ir_shift8(0x0500);//word mode
+ else
+ jtag_ir_shift8(0x0510);//byte mode
+ jtag_ir_shift8(IR_ADDR_16BIT);
+ jtag_dr_shift20(adr);
+
+ SETTCLK;
+
+ jtag_ir_shift8(IR_DATA_TO_ADDR);
+ jtag_ir_shift8(data);//16 word
+
+ CLRTCLK;
+ jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
+ jtag_ir_shift8(0x0501);
+ SETTCLK;
+
+ CLRTCLK;
+ SETTCLK;
+ //init state