updates.

[goodfet] / firmware / apps / jtag / jtag430x2.c

diff --git a/firmware/apps/jtag/jtag430x2.c b/firmware/apps/jtag/jtag430x2.c
index 1acc6e1..db3b613 100644 (file)
--- a/firmware/apps/jtag/jtag430x2.c
+++ b/firmware/apps/jtag/jtag430x2.c
@@ -27,12 +27,12 @@ unsigned char jtag430x2_start(){
   
   //Entry sequence from Page 67 of SLAU265A for 4-wire MSP430 JTAG
   CLRRST;
-  delay(10);//10
+  delay(20);//10
   CLRTST;
 
-  delay(5);//5
+  delay(10);//5
   SETTST;
-  msdelay(5);//5
+  msdelay(10);//5
   SETRST;
   P5DIR&=~RST;
   
@@ -83,7 +83,7 @@ void jtag430x2_writemem(unsigned long adr,
     SETTCLK;
     //init state
   }else{
-    while(1) P1OUT^=1; //loop if locked up
+    while(1) PLEDOUT^=PLEDPIN; //loop if locked up
   }
 }
 
@@ -203,13 +203,28 @@ void jtag430x2handle(unsigned char app,
   case START:
     //Enter JTAG mode.
     //do 
-      cmddata[0]=jtag430x2_start();
+    cmddata[0]=jtag430x2_start();
     //while(cmddata[0]==00 || cmddata[0]==0xFF);
     
     //MSP430 or MSP430X
     if(jtagid==MSP430JTAGID){ 
       jtag430mode=MSP430MODE;
-      drwidth=16;
+      
+      /* So the way this works is that a width of 20 does some
+        backward-compatibility finagling, causing the correct value
+        to be exchanged for addresses on 16-bit chips as well as the
+        new MSP430X chips.  (This has only been verified on the
+        MSP430F2xx family.  TODO verify for others.)
+       */
+
+      drwidth=20;
+      
+      //Perform a reset and disable watchdog.
+      jtag430_por();
+      jtag430_writemem(0x120,0x5a80);//disable watchdog
+      
+      jtag430_haltcpu();
+      
       jtag430_resettap();
       txdata(app,verb,1);
       return;
@@ -217,6 +232,7 @@ void jtag430x2handle(unsigned char app,
       jtag430mode=MSP430X2MODE;
       drwidth=20;
     }else{
+      debugstr("JTAG version unknown.");
       txdata(app,NOK,1);
       return;
     }