-/************************** JTAGARM7TDMI Primitives ****************************/
-void jtag_goto_shift_ir() {
- SETTMS;
- jtag_arm_tcktock();
- jtag_arm_tcktock();
- CLRTMS;
- jtag_arm_tcktock();
- jtag_arm_tcktock();
-
-}
-void jtag_goto_shift_dr() {
- SETTMS;
- jtag_arm_tcktock();
- CLRTMS;
- jtag_arm_tcktock();
- jtag_arm_tcktock();
-}
-
-void jtag_reset_to_runtest_idle() {
- SETTMS;
- jtag_arm_tcktock();
- jtag_arm_tcktock();
- jtag_arm_tcktock();
- jtag_arm_tcktock();
- jtag_arm_tcktock(); // now in Reset state
- CLRTMS;
- jtag_arm_tcktock(); // now in Run-Test/Idle state
-}
-
-void jtag_arm_tcktock() {
- delay(1); // FIXME: Should never wait this long...
- CLRTCK;
- PLEDOUT^=PLEDPIN;
- delay(1); // FIXME: Should never wait this long...
- SETTCK;
- PLEDOUT^=PLEDPIN;
-}
-
// ! Start JTAG, setup pins, reset TAP and return IDCODE
unsigned long jtagarm7tdmi_start() {
}
-// NOTE: important: THIS MODULE REVOLVES AROUND RETURNING TO RUNTEST/IDLE, OR THE FUNCTIONAL EQUIVALENT
-
-
-//! Shift N bits over TDI/TDO. May choose LSB or MSB, and select whether to terminate (TMS-high on last bit) and whether to return to RUNTEST/IDLE
-unsigned long jtagarmtransn(unsigned long word, unsigned char bitcount, unsigned char lsb, unsigned char end, unsigned char retidle){ // PROVEN
- unsigned char bit;
- unsigned long high = 1L;
- unsigned long mask;
-
- //for (bit=(bitcount-1)/8; bit>0; bit--)
- // high <<= 8;
- //high <<= ((bitcount-1)%8);
- high <<= (bitcount-1);
-
- mask = high-1;
-
- if (lsb) {
- for (bit = bitcount; bit > 0; bit--) {
- /* write MOSI on trailing edge of previous clock */
- if (word & 1)
- {SETMOSI;}
- else
- {CLRMOSI;}
- word >>= 1;
-
- if (bit==1 && end)
- SETTMS;//TMS high on last bit to exit.
-
- jtag_arm_tcktock();
-
- /* read MISO on trailing edge */
- if (READMISO){
- word += (high);
- }
- }
- } else {
- for (bit = bitcount; bit > 0; bit--) {
- /* write MOSI on trailing edge of previous clock */
- if (word & high)
- {SETMOSI;}
- else
- {CLRMOSI;}
- word = (word & mask) << 1;
-
- if (bit==1 && end)
- SETTMS;//TMS high on last bit to exit.
-
- jtag_arm_tcktock();
-
- /* read MISO on trailing edge */
- word |= (READMISO);
- }
- }
-
-
- SETMOSI;
-
- if (end){
- // exit state
- jtag_arm_tcktock();
- // update state
- if (retidle){
- CLRTMS;
- jtag_arm_tcktock();
- }
- }
- return word;
-}
-
-
/************************************************************************
* ARM7TDMI core has 6 primary registers to be connected between TDI/TDO
unsigned long jtagarm7tdmi_idcode(){ // PROVEN
jtagarm7tdmi_resettap();
jtag_goto_shift_ir();
- jtagarmtransn(ARM7TDMI_IR_IDCODE, 4, LSB, END, RETIDLE);
+ jtagtransn(ARM7TDMI_IR_IDCODE, 4, LSB);
jtag_goto_shift_dr();
- return jtagarmtransn(0,32, LSB, END, RETIDLE);
+ return jtagtransn(0,32, LSB);
}
//! Connect Bypass Register to TDO/TDI
//! RESTART verb
unsigned long jtagarm7tdmi_restart() {
unsigned long retval;
- //jtagarm7tdmi_resettap();
jtag_goto_shift_ir();
- retval = jtagarmtransn(ARM7TDMI_IR_RESTART, 4, LSB, END, RETIDLE);
- jtagarm7tdmi_resettap();
+ retval = jtagtransn(ARM7TDMI_IR_RESTART, 4, LSB);
+ current_chain = -1;
+ //jtagarm7tdmi_resettap();
return retval;
}
state” to the “Select DR” state each time the “Update” state is reached.
*/
unsigned long retval;
- if (current_chain != chain) {
- //debugstr("===change chains===");
+ //if (current_chain != chain) {
+ // //debugstr("===change chains===");
jtag_goto_shift_ir();
- jtagarmtransn(ARM7TDMI_IR_SCAN_N, 4, LSB, END, NORETIDLE);
+ jtagtransn(ARM7TDMI_IR_SCAN_N, 4, LSB | NORETIDLE);
jtag_goto_shift_dr();
- retval = jtagarmtransn(chain, 4, LSB, END, NORETIDLE);
+ retval = jtagtransn(chain, 4, LSB | NORETIDLE);
+ // put in test mode...
+ //jtag_goto_shift_ir();
+ //jtagarmtransn(testmode, 4, LSB, END, RETIDLE);
current_chain = chain;
- } else
- //debugstr("===NOT change chains===");
- retval = current_chain;
+ //} else {
+ // //debugstr("===NOT change chains===");
+ // retval = current_chain;
+ //}
// put in test mode...
jtag_goto_shift_ir();
- jtagarmtransn(testmode, 4, LSB, END, RETIDLE);
+ jtagtransn(testmode, 4, LSB);
return(retval);
}
CLRMOSI;
count_dbgspd_instr_since_debug++;
}
- jtag_arm_tcktock();
+ jtag_tcktock();
// Now shift in the 32 bits
- retval = jtagarmtransn(instr, 32, MSB, END, RETIDLE); // Must return to RUN-TEST/IDLE state for instruction to enter pipeline, and causes debug clock.
+ retval = jtagtransn(instr, 32, 0); // Must return to RUN-TEST/IDLE state for instruction to enter pipeline, and causes debug clock.
return(retval);
}
//! set the current mode to ARM, returns PC (FIXME). Should be used by haltcpu(), which should also store PC and the THUMB state, for use by releasecpu();
unsigned long jtagarm7tdmi_setMode_ARM(unsigned char restart){ // PROVEN BUT FUGLY! FIXME: clean up and store and replace clobbered r0
- debugstr("=== Switching to ARM mode ===");
+ jtagarm7tdmi_resettap(); // seems necessary for some reason. ugh.
unsigned long retval = 0xffL;
- if ((current_dbgstate & JTAG_ARM7TDMI_DBG_TBIT)&& retval-- > 0){
+ if ((current_dbgstate & JTAG_ARM7TDMI_DBG_TBIT)){
+ debugstr("=== Switching to ARM mode ===");
cmddatalong[1] = jtagarm7tdmi_instr_primitive(THUMB_INSTR_NOP,0);
cmddatalong[2] = jtagarm7tdmi_instr_primitive(THUMB_INSTR_STR_R0_r0,0);
cmddatalong[3] = jtagarm7tdmi_instr_primitive(THUMB_INSTR_MOV_R0_PC,0);
cmddatalong[5] = jtagarm7tdmi_instr_primitive(THUMB_INSTR_BX_PC,0);
} else {
jtagarm7tdmi_set_register(15,(last_halt_pc|0xfffffffc)-24);
- jtagarm7tdmi_nop( 1);
+ jtagarm7tdmi_nop( restart);
cmddatalong[1] = jtagarm7tdmi_instr_primitive(ARM_INSTR_B_IMM,0);
}
if (restart) {
//! set the current mode to ARM, returns PC (FIXME). Should be used by releasecpu()
unsigned long jtagarm7tdmi_setMode_THUMB(unsigned char restart){ // PROVEN
+ jtagarm7tdmi_resettap(); // seems necessary for some reason. ugh.
debugstr("=== Switching to THUMB mode ===");
unsigned long retval = 0xffL;
while (!(current_dbgstate & JTAG_ARM7TDMI_DBG_TBIT)&& retval-- > 0){
jtagarm7tdmi_scan_intest(2);
// Now shift in the 32 bits
jtag_goto_shift_dr();
- retval = jtagarmtransn(data, 32, LSB, NOEND, NORETIDLE); // send in the data - 32-bits lsb
- temp = jtagarmtransn(reg, 5, LSB, NOEND, NORETIDLE); // send in the register address - 5 bits lsb
- jtagarmtransn(1, 1, LSB, END, RETIDLE); // send in the WRITE bit
+ retval = jtagtransn(data, 32, LSB| NOEND| NORETIDLE); // send in the data - 32-bits lsb
+ temp = jtagtransn(reg, 5, LSB| NOEND| NORETIDLE); // send in the register address - 5 bits lsb
+ jtagtransn(1, 1, LSB); // send in the WRITE bit
return(retval);
}
// send in the register address - 5 bits LSB
jtag_goto_shift_dr();
- temp = jtagarmtransn(reg, 5, LSB, NOEND, NORETIDLE);
+ temp = jtagtransn(reg, 5, LSB| NOEND| NORETIDLE);
// clear TDI to select "read only"
- jtagarmtransn(0L, 1, LSB, END, RETIDLE);
+ jtagtransn(0L, 1, LSB);
jtag_goto_shift_dr();
// Now shift out the 32 bits
- retval = jtagarmtransn(0L, 32, LSB, END, RETIDLE); // atmel arm jtag docs pp.10-11: LSB first
+ retval = jtagtransn(0L, 32, LSB); // atmel arm jtag docs pp.10-11: LSB first
//debughex32(retval);
return(retval); // atmel arm jtag docs pp.10-11: LSB first
//! Set a 32-bit Register value
void jtagarm7tdmi_set_register(unsigned long reg, unsigned long val) { // PROVEN (assuming target reg is word aligned)
unsigned long instr;
- instr = (unsigned long)(((unsigned long)reg<<12L) | ARM_WRITE_REG); // LDR Rx, [R14]
+ //if (current_dbgstate & JTAG_ARM7TDMI_DBG_TBIT)
+ //instr = THUMB_WRITE_REG
+ instr = (unsigned long)(((unsigned long)reg<<12L) | ARM_WRITE_REG); // LDR Rx, [R14]
jtagarm7tdmi_nop( 0); // push nop into pipeline - clean out the pipeline...
jtagarm7tdmi_nop( 0); // push nop into pipeline - clean out the pipeline...
}
-
+/*
//! Get all registers, placing them into cmddatalong[0-14]
void jtagarm7tdmi_get_registers() { // BORKEN. FIXME
jtagarm7tdmi_nop( 0);
jtagarm7tdmi_instr_primitive(cmddatalong[14],0);
jtagarm7tdmi_nop( 0);
}
-
+*/
//! Retrieve the CPSR Register value
unsigned long jtagarm7tdmi_get_regCPSR() {
unsigned long retval = 0L, r0;
//! Halt CPU - returns 0xffff if the operation fails to complete within
unsigned long jtagarm7tdmi_haltcpu(){ // PROVEN
- int waitcount = 0xfffL;
+ int waitcount = 0xffL;
// store the debug state
last_halt_debug_state = jtagarm7tdmi_get_dbgstate();
- jtagarm7tdmi_set_dbgctrl(7);
+ //jtagarm7tdmi_set_dbgctrl(7);
// store watchpoint info? - not right now
- //jtagarm7tdmi_set_watchpoint1(0, 0xffffffff, 0, 0xffffffff, 0x100L, 0xfffffff7);
+ jtagarm7tdmi_set_watchpoint1(0, 0xffffffff, 0, 0xffffffff, 0x100L, 0xfffffff7);
/* // old method
delay(1);
}
- jtagarm7tdmi_set_dbgctrl(0);
- //jtagarm7tdmi_set_watchpoint1(0, 0x0, 0, 0x0, 0x0L, 0xfffffff7);
+ //jtagarm7tdmi_set_dbgctrl(0);
+ jtagarm7tdmi_set_watchpoint1(0, 0x0, 0, 0x0, 0x0L, 0xfffffff7);
//jtagarm7tdmi_disable_watchpoint1();
//eice_write(EICE_WP1CTRL, 0x0L); // write 0 in watchpoint 0 control value - disables watchpoint 0
// store the debug state program counter.
- last_halt_pc = jtagarm7tdmi_get_real_pc();
+ last_halt_pc = jtagarm7tdmi_get_real_pc(); // FIXME: grag chain0 to get all state and PC
count_dbgspd_instr_since_debug = 0L; // should be able to clean this up and remove all this tracking nonsense.
count_sysspd_instr_since_debug = 0L; // should be able to clean this up and remove all this tracking nonsense.
unsigned int val; //, i;
//unsigned long at;
- jtagarm7tdmi_resettap();
- current_dbgstate = jtagarm7tdmi_get_dbgstate();
+ //jtagarm7tdmi_resettap();
+ //current_dbgstate = jtagarm7tdmi_get_dbgstate();
switch(verb){
case START:
debughex32(jtagarm7tdmi_start());
cmddatalong[0] = jtagarm7tdmi_get_dbgstate();
txdata(app,verb,0x4);
+ current_dbgstate = jtagarm7tdmi_get_dbgstate();
break;
/*
case JTAGARM7TDMI_READMEM:
txdata(app,verb,4);
break;
case JTAGARM7TDMI_RELEASECPU:
- jtagarm7tdmi_resettap();
+ //jtagarm7tdmi_resettap();
cmddatalong[0] = jtagarm7tdmi_releasecpu();
txdata(app,verb,4);
break;
break;
case JTAGARM7TDMI_GET_DEBUG_STATE:
//jtagarm7tdmi_resettap(); // Shouldn't need this, but currently do. FIXME!
+ current_dbgstate = jtagarm7tdmi_get_dbgstate();
cmddatalong[0] = current_dbgstate;
txdata(app,verb,4);
break;
//case JTAGARM7TDMI_GET_WATCHPOINT:
//case JTAGARM7TDMI_SET_WATCHPOINT:
case JTAGARM7TDMI_GET_REGISTER:
- jtagarm7tdmi_resettap();
+ //jtagarm7tdmi_resettap();
val = cmddata[0];
cmddatalong[0] = jtagarm7tdmi_get_register(val);
txdata(app,verb,4);
break;
case JTAGARM7TDMI_SET_REGISTER:
- jtagarm7tdmi_resettap();
+ //jtagarm7tdmi_resettap();
jtagarm7tdmi_set_register(cmddatalong[1], cmddatalong[0]);
txdata(app,verb,4);
break;
- case JTAGARM7TDMI_GET_REGISTERS:
- jtagarm7tdmi_resettap();
- jtagarm7tdmi_get_registers();
- txdata(app,verb,64);
- break;
- case JTAGARM7TDMI_SET_REGISTERS:
- jtagarm7tdmi_resettap();
- jtagarm7tdmi_set_registers();
- txdata(app,verb,64);
- break;
case JTAGARM7TDMI_DEBUG_INSTR:
//jtagarm7tdmi_resettap();
//cmddataword[0] = jtagarm7tdmi_exec(cmddataword[0], cmddata[4]);
- cmddataword[0] = jtagarm7tdmi_instr_primitive(cmddataword[0],cmddata[4]);
+ cmddatalong[0] = jtagarm7tdmi_instr_primitive(cmddatalong[0],cmddata[4]);
txdata(app,verb,8);
break;
//case JTAGARM7TDMI_STEP_INSTR:
txdata(app,verb,4);
break;
case JTAGARM7TDMI_SET_IR:
- jtagarm7tdmi_resettap();
+ //jtagarm7tdmi_resettap();
jtag_goto_shift_ir();
- cmddataword[0] = jtagarmtransn(cmddata[0], 4, LSB, END, RETIDLE);
+ cmddataword[0] = jtagtransn(cmddata[0], 4, cmddata[1]);
+ current_chain = -1;
txdata(app,verb,2);
break;
case JTAGARM7TDMI_WAIT_DBG:
case JTAGARM7TDMI_SHIFT_DR:
jtagarm7tdmi_resettap();
jtag_goto_shift_dr();
- cmddatalong[0] = jtagarmtransn(cmddatalong[1],cmddata[0],cmddata[1],cmddata[2],cmddata[3]);
+ cmddatalong[0] = jtagtransn(cmddatalong[1],cmddata[0],cmddata[1]);
txdata(app,verb,4);
break;
+ case JTAGARM7TDMI_CHAIN0:
+ jtagarm7tdmi_scan_intest(0);
+ jtag_goto_shift_dr();
+ debughex32(cmddatalong[0]);
+ debughex(cmddataword[4]);
+ debughex32(cmddatalong[1]);
+ debughex32(cmddatalong[3]);
+ cmddatalong[0] = jtagtransn(cmddatalong[0], 32, LSB| NOEND| NORETIDLE);
+ cmddatalong[2] = jtagtransn(cmddataword[4], 9, MSB| NOEND| NORETIDLE);
+ cmddatalong[1] = jtagtransn(cmddatalong[1], 32, MSB| NOEND| NORETIDLE);
+ cmddatalong[3] = jtagtransn(cmddatalong[3], 32, MSB);
+ txdata(app,verb,16);
+ break;
case JTAGARM7TDMI_SETWATCH0:
jtagarm7tdmi_set_watchpoint0(cmddatalong[0], cmddatalong[1], cmddatalong[2], cmddatalong[3], cmddatalong[4], cmddatalong[5]);
txdata(app,verb,4);
projects / goodfet / blobdiff