uint8_t const verb,
uint32_t const len){
unsigned long i;
+ u8 j;
//debugstr("Chipcon SPI handler.");
case WRITE:
case POKE:
CLRSS; //Drop !SS to begin transaction.
+ j=cmddata[0];//Backup address.
for(i=0;i<len;i++)
cmddata[i]=ccspitrans8(cmddata[i]);
SETSS; //Raise !SS to end transaction.
+ cmddata[0]=j&~0x40;//Restore address.
txdata(app,verb,len);
break;
case SETUP:
#ifdef FIFOP
//Has there been an overflow?
if((!FIFO)&&FIFOP){
- debugstr("Clearing overflow");
+ //debugstr("Clearing overflow");
CLRSS;
ccspitrans8(0x08); //SFLUSHRX
SETSS;
if(FIFOP&&FIFO){
//Wait for completion.
while(SFD);
-
+
//Get the packet.
CLRSS;
ccspitrans8(CCSPI_RXFIFO | 0x40);
CLRSS;
ccspitrans8(0x08); //SFLUSHRX
SETSS;
+
+
//Only should transmit length of one more than the reported
// length of the frame, which holds the length byte:
txdata(app,verb,cmddata[0]+1);
//Wait for last packet to TX.
//while(ccspi_status()&BIT3);
+
+ //Flush TX buffer.
+ CLRSS;
+ ccspitrans8(0x09); //SFLUSHTX
+ SETSS;
+
//Load the packet.
CLRSS;
//Wait for the pulse on SFD, after which the packet has been sent.
while(!SFD);
while(SFD);
-
- //Flush TX buffer.
- CLRSS;
- ccspitrans8(0x09); //SFLUSHTX
- SETSS;
-
+
txdata(app,verb,0);
#else
debugstr("Can't TX a packet with SFD and FIFOP definitions.");