I think this will add support for decryption of incoming packets, but I might be...

[goodfet] / firmware / apps / radios / ccspi.c

diff --git a/firmware/apps/radios/ccspi.c b/firmware/apps/radios/ccspi.c
index 62d0130..5d40f11 100644 (file)
--- a/firmware/apps/radios/ccspi.c
+++ b/firmware/apps/radios/ccspi.c
@@ -50,12 +50,14 @@ void ccspisetup(){
   DIRSS;
   DIRCE;
 
-  P4OUT|=BIT5; //activate CC2420 voltage regulator
+  //P4OUT|=BIT5; //activate CC2420 voltage regulator
   msdelay(100);
 
   //Reset the CC2420.
-  P4OUT&=~BIT6;
-  P4OUT|=BIT6;
+  /*P4OUT&=~BIT6; FIXME Does the new code work on Z1 and Telosb?
+    P4OUT|=BIT6;*/ 
+  CLRCE;
+  SETCE;
 
   //Begin a new transaction.
   CLRSS;
@@ -101,7 +103,7 @@ void ccspireflexjam(u16 delay){
     while(!SFD){
       //Has there been an overflow in the RX buffer?
       if((!FIFO)&&FIFOP){
-       debugstr("Clearing RX overflow");
+       //debugstr("Clearing RX overflow");
        CLRSS;
        ccspitrans8(0x08); //SFLUSHRX
        SETSS;
@@ -116,42 +118,39 @@ void ccspireflexjam(u16 delay){
     //Wait a few us to send it.
     delay_us(delay);
 
-    //Put radio in TX mode
+    //Transmit the packet.
     CLRSS;
     ccspitrans8(0x04);
     SETSS;
     
     
-    //Load the jamming packet.
+    //Load the next jamming packet.
     //Note: attempts to preload this actually slowed the jam time down from 7 to 9 bytes.
     CLRSS;
     ccspitrans8(CCSPI_TXFIFO);
-    char pkt[15] = {0x0f, 0x01, 0x08, 0x82, 0xff, 0xff, 0xff, 0xff, 0xde, 0xad, 0xbe, 0xef, 0xba, 0xbe, 0xc0};
+    char pkt[5] = {0x05, 0, 0, 0, 0};
+    //char pkt[15] = {0x0f, 0x01, 0x08, 0x82, 0xff, 0xff, 0xff, 0xff, 0xde, 0xad, 0xbe, 0xef, 0xba, 0xbe, 0xc0};
     //char pkt[12] = {0x0c, 0x01, 0x08, 0x82, 0xff, 0xff, 0xff, 0xff, 0xde, 0xad, 0xbe, 0xef};
     for(i=0;i<pkt[0];i++)
       ccspitrans8(pkt[i]);
     SETSS;
     
-    
-    //Transmit the packet.
-    CLRSS;
-    ccspitrans8(0x04); //STXON
-    SETSS;
-    
+    //* I think this might be unnecessary.
     //msdelay(100+delay);      //Instead of waiting for pulse on SFD
-    delay_ms(1);
+    //delay_ms(1);
     //Flush TX buffer.
     CLRSS;
     ccspitrans8(0x09); //SFLUSHTX
     SETSS;
-
+    
+    
     //Turn off LED 2 (green) as signal
     PLED2DIR |= PLED2PIN;
     PLED2OUT |= PLED2PIN;
   }
 #else
   debugstr("Can't reflexively jam without SFD, FIFO, FIFOP, and P2LEDx definitions - try using telosb platform.");
-  txdata(app,NOK,0);
+  txdata(CCSPI,NOK,0);
 #endif
 }
 
@@ -212,10 +211,12 @@ void ccspi_handle_fn( uint8_t const app,
 #ifdef FIFOP
     //Has there been an overflow?
     if((!FIFO)&&FIFOP){
-      //debugstr("Clearing overflow");
+      debugstr("Clearing overflow");
       CLRSS;
       ccspitrans8(0x08); //SFLUSHRX
       SETSS;
+      txdata(app,verb,0); //no packet
+      return;
     }
 
     //Is there a packet?
@@ -227,20 +228,84 @@ void ccspi_handle_fn( uint8_t const app,
       CLRSS;
       ccspitrans8(CCSPI_RXFIFO | 0x40);
       //ccspitrans8(0x3F|0x40);
-      cmddata[0]=0xff; //to be replaced with length
-      for(i=0;i<cmddata[0]+2;i++)
-        cmddata[i]=ccspitrans8(0xde);
+      cmddata[0]=0x20; //to be replaced with length
+      
+      
+      /* This reads too far on some CC2420 revisions, but on others it
+        works fine.  It probably has to do with whether FIFO drops
+        before or after the SPI clocking.
+        
+        A software fix is to reset the CC2420 between packets.  This
+        works, but a better solution is desired.
+      */
+      for(i=0;i<cmddata[0]+1;i++)
+      //for(i=0;FIFO && i<0x80;i++)
+        cmddata[i]=ccspitrans8(0x00);
       SETSS;
 
-      //Flush buffer.
+      /* We used to flush the RX buffer after receive. No longer.
+      CLRSS;
+      ccspitrans8(0x08); //SFLUSHRX
+      SETSS;
+      */
+      
+      //Only should transmit a packet if the length is legal.
+      if(cmddata[0]&0x80) i=0;
+      txdata(app,verb,i);
+    }else{
+      //No packet.
+      txdata(app,verb,0);
+    }
+#else
+    debugstr("Can't RX a packet with SFD and FIFOP definitions.");
+    txdata(app,NOK,0);
+#endif
+    break;
+  case CCSPI_RXDEC:
+#ifdef FIFOP
+    //Has there been an overflow?
+    if((!FIFO)&&FIFOP){
+      debugstr("Clearing overflow");
       CLRSS;
       ccspitrans8(0x08); //SFLUSHRX
       SETSS;
+      txdata(app,verb,0); //no packet
+      return;
+    }
+
+    //Is there a packet?
+    if(FIFOP&&FIFO){
+      //Wait for completion.
+      while(SFD);
+      
+      //Decrypt the packet.
+      CLRSS; ccspitrans8(CCSPI_SRXDEC); SETSS;
       
+      //Wait for decryption to complete.
+      while(!FIFO);
       
-      //Only should transmit length of one more than the reported
-      // length of the frame, which holds the length byte:
-      txdata(app,verb,cmddata[0]+1);
+      //Get the packet.
+      CLRSS;
+      ccspitrans8(CCSPI_RXFIFO | 0x40);
+      //ccspitrans8(0x3F|0x40);
+      cmddata[0]=0x20; //to be replaced with length
+      
+      
+      /* This reads too far on some CC2420 revisions, but on others it
+        works fine.  It probably has to do with whether FIFO drops
+        before or after the SPI clocking.
+        
+        A software fix is to reset the CC2420 between packets.  This
+        works, but a better solution is desired.
+      */
+      for(i=0;i<cmddata[0]+1;i++)
+      //for(i=0;FIFO && i<0x80;i++)
+        cmddata[i]=ccspitrans8(0x00);
+      SETSS;
+      
+      //Only should transmit a packet if the length is legal.
+      if(cmddata[0]&0x80) i=0;
+      txdata(app,verb,i);
     }else{
       //No packet.
       txdata(app,verb,0);
@@ -365,8 +430,8 @@ void ccspi_handle_fn( uint8_t const app,
         //TODO disable AUTOCRC here again to go back to promiscous mode
 
         //Turn off LED 2 (green) as signal
-           PLED2DIR |= PLED2PIN;
-           PLED2OUT |= PLED2PIN;
+       PLED2DIR |= PLED2PIN;
+       PLED2OUT |= PLED2PIN;
     }
     //TODO the firmware stops staying in this mode after a while, and stops jamming... need to find a fix.
 #else