CCSPI transmissions work.

[goodfet] / firmware / apps / radios / ccspi.c

diff --git a/firmware/apps/radios/ccspi.c b/firmware/apps/radios/ccspi.c
index ff46616..f47e54c 100644 (file)
--- a/firmware/apps/radios/ccspi.c
+++ b/firmware/apps/radios/ccspi.c
@@ -54,10 +54,14 @@ void ccspisetup(){
   DIRCE;
   
   P4OUT|=BIT5; //activate CC2420 voltage regulator
-  P4OUT|=BIT6; //bring CC2420 out of reset
+  msdelay(100);
+  
+  //Reset the CC2420.
+  P4OUT&=~BIT6;
+  P4OUT|=BIT6;
   
   //Begin a new transaction.
-  CLRSS; 
+  CLRSS;
   SETSS;
 }
 
@@ -118,45 +122,59 @@ void ccspi_handle_fn( uint8_t const app,
   //debugstr("Chipcon SPI handler.");
   
   switch(verb){
+  case PEEK:
+    cmddata[0]|=0x40; //Set the read bit.
+    //DO NOT BREAK HERE.
   case READ:
   case WRITE:
+  case POKE:
     CLRSS; //Drop !SS to begin transaction.
     for(i=0;i<len;i++)
       cmddata[i]=ccspitrans8(cmddata[i]);
     SETSS;  //Raise !SS to end transaction.
     txdata(app,verb,len);
     break;
-
-  case PEEK://Grab CCSPI Register
-    CLRSS; //Drop !SS to begin transaction.
-    cmddata[0]=ccspitrans8(/*CCSPI_R_REGISTER |*/ cmddata[0]); //000A AAAA
-    for(i=1;i<len;i++)
-      cmddata[i]=ccspitrans8(cmddata[i]);
-    SETSS;  //Raise !SS to end transaction.
-    txdata(app,verb,len);
-    break;
-    
-  case POKE://Poke CCSPI Register
-    CLRSS; //Drop !SS to begin transaction.
-    cmddata[0]=ccspitrans8(/* CCSPI_W_REGISTER |*/ 0x40 | cmddata[0]); //02AA AAAA
-    for(i=1;i<len;i++)
-      cmddata[i]=ccspitrans8(cmddata[i]);
-    SETSS;  //Raise !SS to end transaction.
-    txdata(app,verb,len);
-    break;
   case SETUP:
     ccspisetup();
     txdata(app,verb,0);
     break;
   case CCSPI_RX:
-    //Get the packet.
-    CLRSS;
-    ccspitrans8(CCSPI_RXFIFO);
-    for(i=0;i<32;i++)
-      cmddata[i]=ccspitrans8(0xde);
-    SETSS;
-    //no break
-    txdata(app,verb,32);
+#ifdef FIFOP
+     //Has there been an overflow?
+    if((!FIFO)&&FIFOP){
+      debugstr("Clearing overflow");
+      CLRSS;
+      ccspitrans8(0x08); //SFLUSHRX
+      SETSS;
+    }
+    
+    //Is there a packet?
+    if(FIFOP&&FIFO){
+      //Wait for completion.
+      while(SFD);
+      
+      //Get the packet.
+      CLRSS;
+      ccspitrans8(CCSPI_RXFIFO | 0x40);
+      //ccspitrans8(0x3F|0x40);
+      cmddata[0]=0xff; //to be replaced with length
+      for(i=0;i<cmddata[0]+2;i++)
+       cmddata[i]=ccspitrans8(0xde);
+      SETSS;
+      
+      //Flush buffer.
+      CLRSS;
+      ccspitrans8(0x08); //SFLUSHRX
+      SETSS;
+      txdata(app,verb,cmddata[0]+2);
+    }else{
+      //No packet.
+      txdata(app,verb,0);
+    }
+#else
+    debugstr("Can't RX a packet with SFD and FIFOP definitions.");
+    txdata(app,NOK,0);
+#endif
     break;
   case CCSPI_RX_FLUSH:
     //Flush the buffer.
@@ -164,13 +182,57 @@ void ccspi_handle_fn( uint8_t const app,
     ccspitrans8(CCSPI_SFLUSHRX);
     SETSS;
     
-    //Return the packet.
-    txdata(app,verb,32);
+    txdata(app,verb,0);
+    break;
+  case CCSPI_REFLEX:
+    debugstr("Coming soon.");
+    txdata(app,verb,0);
     break;
-  case CCSPI_TX:
   case CCSPI_TX_FLUSH:
+     //Flush the buffer.
+    CLRSS;
+    ccspitrans8(CCSPI_SFLUSHTX);
+    SETSS;
+    
+    txdata(app,verb,0);
+    break;
+  case CCSPI_TX:
+#ifdef FIFOP
+    
+    /* //Has there been an overflow?
+    if(ccspi_status()&BIT5){
+      debugstr("Clearing underflow");
+      CLRSS;
+      ccspitrans8(0x09); //SFLUSHTX
+      SETSS;
+    } 
+    */
+    
+        
+    //Wait for last packet to TX.
+    //while(ccspi_status()&BIT3);
+    
+    //Load the packet.
+    CLRSS;
+    ccspitrans8(CCSPI_TXFIFO);
+    for(i=0;i<cmddata[0];i++)
+      ccspitrans8(cmddata[i]);
+    SETSS;
+    
+    //Transmit the packet.
+    CLRSS;
+    ccspitrans8(0x04); //STXON
+    SETSS;
+    
+    
+    txdata(app,verb,0);
+#else
+    debugstr("Can't TX a packet with SFD and FIFOP definitions.");
+    txdata(app,NOK,0);
+#endif
+    break;
   default:
-    debugstr("Not yet supported.");
+    debugstr("Not yet supported in CCSPI");
     txdata(app,verb,0);
     break;
   }