-//GoodFET SPI Application
-//Handles basic I/O
+/*! \file spi.c
+ \author Travis Goodspeed
+ \brief SPI Master
+*/
//Higher level left to client application.
//This could be more accurate.
//Does it ever need to be?
#define SPISPEED 0
-#define SPIDELAY(x) delay(x)
+#define SPIDELAY(x)
+//delay(x)
//! Set up the pins for SPI mode.
//! Enable SPI writing
void spiflash_wrten(){
SETSS;
+ /*
P5OUT&=~SS; //Drop !SS to begin transaction.
spitrans8(0x04);//Write Disable
P5OUT|=SS; //Raise !SS to end transaction.
+ */
P5OUT&=~SS; //Drop !SS to begin transaction.
spitrans8(0x06);//Write Enable
P5OUT|=SS; //Raise !SS to end transaction.
spitrans8(buf[i]);
SETSS; //Raise !SS to end transaction.
- while(spiflash_status()&0x01)
- ;
+ while(spiflash_status()&0x01);
return;
}
unsigned char verb,
unsigned char len){
register char blocks=(len>3?cmddata[3]:1);
- unsigned char i,j;
+ unsigned char i;
P5OUT&=~SS; //Drop !SS to begin transaction.
spitrans8(0x03);//Flash Read Command
unsigned char len){
unsigned char i;
-
//Raise !SS to end transaction, just in case we forgot.
- P5OUT|=SS;
+ P5OUT|=SS;
+ spisetup();
switch(verb){
//PEEK and POKE might come later.
case SPI_JEDEC://Grab 3-byte JEDEC ID.
P5OUT&=~SS; //Drop !SS to begin transaction.
spitrans8(0x9f);
- len=3;
+ len=3; //Length is variable in some chips, 3 minimum.
for(i=0;i<len;i++)
cmddata[i]=spitrans8(cmddata[i]);
txdata(app,verb,len);
spiflash_setstatus(0x02);
spiflash_wrten();
- P5OUT&=~SS; //Drop !SS to begin transaction.
- spitrans8(0x02); //Poke command.
+ P5OUT&=~SS; //Drop !SS to begin transaction.
+ spitrans8(0x02); //Poke command.
//First three bytes are address, then data.
for(i=0;i<len;i++)
spitrans8(cmddata[i]);
- P5OUT|=SS; //Raise !SS to end transaction.
+ P5OUT|=SS; //Raise !SS to end transaction.
- while(spiflash_status()&0x01)//while busy
+
+ while(spiflash_status()&0x01)
P1OUT^=1;
+
P1OUT&=~1;
txdata(app,verb,len);