//This could be more accurate.
//Does it ever need to be?
#define SPISPEED 0
-#define SPIDELAY(x)
-//delay(x)
+#define SPIDELAY(x) delay(x)
//! Set up the pins for SPI mode.
void spisetup(){
- P5OUT|=SS;
- P5DIR|=MOSI+SCK+SS;
+ SETSS;
+ P5DIR|=MOSI+SCK+BIT0; //BIT0 might be SS
P5DIR&=~MISO;
+ DIRSS;
//Begin a new transaction.
- P5OUT&=~SS;
- P5OUT|=SS;
+
+ CLRSS;
+ SETSS;
+
}
else
CLRMOSI;
byte <<= 1;
-
+
+ //SPIDELAY(100);
SETCLK;
+ //SPIDELAY(100);
/* read MISO on trailing edge */
byte |= READMISO;
CLRCLK;
}
-
return byte;
}
void spiflash_wrten(){
SETSS;
/*
- P5OUT&=~SS; //Drop !SS to begin transaction.
+ CLRSS; //Drop !SS to begin transaction.
spitrans8(0x04);//Write Disable
- P5OUT|=SS; //Raise !SS to end transaction.
+ SETSS; //Raise !SS to end transaction.
*/
- P5OUT&=~SS; //Drop !SS to begin transaction.
+ CLRSS; //Drop !SS to begin transaction.
spitrans8(0x06);//Write Enable
- P5OUT|=SS; //Raise !SS to end transaction.
+ SETSS; //Raise !SS to end transaction.
}
//! Grab the SPI flash status byte.
unsigned char spiflash_status(){
unsigned char c;
- P5OUT|=SS; //Raise !SS to end transaction.
- P5OUT&=~SS; //Drop !SS to begin transaction.
+ SETSS; //Raise !SS to end transaction.
+ CLRSS; //Drop !SS to begin transaction.
spitrans8(0x05);//GET STATUS
c=spitrans8(0xFF);
- P5OUT|=SS; //Raise !SS to end transaction.
+ SETSS; //Raise !SS to end transaction.
return c;
}
SETSS;
- //while(spiflash_status()&0x01);//minor performance impact
+ //if(len!=0x100)
+ // debugstr("Non-standard block size.");
+
+ while(spiflash_status()&0x01);//minor performance impact
+
+ spiflash_setstatus(0x02);
+ spiflash_wrten();
//Are these necessary?
//spiflash_setstatus(0x02);
long off=0;//offset of this block
int blen;//length of this block
SETSS;
- spiflash_setstatus(0x02);
- spiflash_wrten();
while(off<len){
//calculate block length
unsigned char verb,
unsigned long len){
unsigned int i;
- P5OUT&=~SS; //Drop !SS to begin transaction.
+ CLRSS; //Drop !SS to begin transaction.
spitrans8(0x03);//Flash Read Command
len=3;//write 3 byte pointer
for(i=0;i<len;i++)
while(len--)
serial_tx(spitrans8(0));
- P5OUT|=SS; //Raise !SS to end transaction.
+ SETSS; //Raise !SS to end transaction.
+}
+
+
+//! Erase a sector.
+void spiflash_erasesector(unsigned long adr){
+ //debugstr("Erasing a 4kB sector.");
+
+ //Write enable.
+ spiflash_wrten();
+
+ //Begin
+ CLRSS;
+
+ //Second command.
+ spitrans8(0x20);
+ //Send address
+ spitrans8((adr&0xFF0000)>>16);
+ spitrans8((adr&0xFF00)>>8);
+ spitrans8(adr&0xFF);
+
+ SETSS;
+ while(spiflash_status()&0x01);//while busy
+ //debugstr("Erased.");
+}
+
+
+//! Wake an EM260 Radio
+void em260_wake(){
+ //debugstr("Waking EM260.");
+ #define RST BIT6
+ P2DIR|=RST;
+ SETRST;
+ delay(1024);
+
+ CLRRST;//Wake chip.
+ while(P4IN&1);
+ SETRST;//Woken.
+ //debugstr("EM260 is now awake.");
+ delay(1024); //DO NOT REMOVE, fails without.
+}
+//! Handle an EM260 exchange.
+void spi_rw_em260(u8 app, u8 verb, u32 len){
+ unsigned long i;
+ u8 lastin;
+
+ P4DIR=0; //TODO ASAP remove P4 references.
+ P4OUT=0xFF;
+ //P4REN=0xFF;
+
+ //See GoodFETEM260.py for details.
+ //The EM260 requires that the host wait for the client.
+
+ /*
+ if((~P4IN)&1)
+ debugstr("Detected HOST_INT.");
+ */
+
+ em260_wake();
+
+
+ SETMOSI; //Autodetected SPI mode.
+ CLRSS; //Drop !SS to begin transaction.
+ //Host to slave. Ignore data.
+ for(i=0;i<len;i++){
+ lastin=spitrans8(cmddata[i]);
+ if(lastin!=0xFF){
+ //debugstr("EM260 transmission interrupted.");
+ cmddata[0]=lastin;
+ goto response;
+ }
+ }
+ //debugstr("Finished transmission to EM260.");
+
+ //Wait for nHOST_INT to drop.
+ i=0xffff;
+
+ /*
+ while(P4IN&1
+ && --i
+ )
+ spitrans8(0xFF);
+ */
+ while((cmddata[0]=spitrans8(0xFF))==0xFF
+ && --i);
+
+ if(!i)
+ debugstr("Gave up on host interrupt.");
+
+ response:
+ len=1;
+ while(
+ (cmddata[len++]=spitrans8(0xFF))!=0xA7
+ );
+ if(cmddata[0]==0xFE)
+ while(len<cmddata[1]+3)
+ cmddata[len++]=spitrans8(0xFF);
+ SETSS; //Raise !SS to end transaction.
+
+ txdata(app,verb,len);
+ return;
}
//! Handles a monitor command.
unsigned long len){
unsigned long i;
+
//Raise !SS to end transaction, just in case we forgot.
- P5OUT|=SS;
- spisetup();
+ SETSS;
+ //spisetup();
switch(verb){
//PEEK and POKE might come later.
case READ:
case WRITE:
- P5OUT&=~SS; //Drop !SS to begin transaction.
+ CLRSS; //Drop !SS to begin transaction.
for(i=0;i<len;i++)
cmddata[i]=spitrans8(cmddata[i]);
- P5OUT|=SS; //Raise !SS to end transaction.
+ SETSS; //Raise !SS to end transaction.
txdata(app,verb,len);
break;
-
-
+
+ case SPI_RW_EM260: //SPI exchange with an EM260
+ spi_rw_em260(app,verb,len);
+ break;
+
case SPI_JEDEC://Grab 3-byte JEDEC ID.
- P5OUT&=~SS; //Drop !SS to begin transaction.
+ CLRSS; //Drop !SS to begin transaction.
spitrans8(0x9f);
len=3; //Length is variable in some chips, 3 minimum.
for(i=0;i<len;i++)
cmddata[i]=spitrans8(cmddata[i]);
txdata(app,verb,len);
- P5OUT|=SS; //Raise !SS to end transaction.
+ SETSS; //Raise !SS to end transaction.
break;
-
-
+
case PEEK://Grab 128 bytes from an SPI Flash ROM
spiflash_peek(app,verb,len);
break;
cmddata+4,//buf
len-4);//len
- txdata(app,verb,len);
+ txdata(app,verb,0);
break;
case SPI_ERASE://Erase the SPI Flash ROM.
spiflash_wrten();
- P5OUT&=~SS; //Drop !SS to begin transaction.
+ CLRSS; //Drop !SS to begin transaction.
spitrans8(0xC7);//Chip Erase
- P5OUT|=SS; //Raise !SS to end transaction.
+ SETSS; //Raise !SS to end transaction.
while(spiflash_status()&0x01)//while busy
- P1OUT^=1;
- P1OUT&=~1;
+ PLEDOUT^=PLEDPIN;
+ PLEDOUT&=~PLEDPIN;
txdata(app,verb,0);
break;