may have trouble communicating with the client. The latter likely
relates to the FTDI on-chip 3V3 regulator being specified up to
only 50 mA. */
- P5DIR |= BIT0;
- P5REN &= ~BIT0;
- P5OUT &= ~BIT0;
+
+
+ //P5REN &= ~BIT0; //DO NOT UNCOMMENT. Breaks GF1x support.
+
+ //This will have to be cut soon. Use pulling resistors instead.
+ /*
+ P5DIR |= BIT0;
+ P5OUT &= ~BIT0;
+ */
//Setup clocks, unique to each '430.
msp430_init_dco();
msp430_init_uart();
-
+
//DAC should be at full voltage if it exists.
#ifdef DAC12IR
//glitchvoltages(0xfff,0xfff);
unsigned char verb,
unsigned long len){
//debugstr("GoodFET");
- P1OUT&=~1;
+ PLEDOUT&=~PLEDPIN;
switch(app){
case GLITCH:
glitchhandle(app,verb,len);
case NRF:
nrfhandle(app,verb,len);
break;
+ case CCSPI:
+ ccspihandle(app,verb,len);
+ break;
case AVR:
avrhandle(app,verb,len);
break;
case PIC:
pichandle(app,verb,len);
break;
-
+ case ADC10:
+ adchandle(app,verb,len);
+ break;
case I2CAPP:
i2chandle(app,verb,len);
break;
case EJTAG:
ejtaghandle(app,verb,len);
break;
+ case JTAGXSCALE:
+ xscalehandle(app,verb,len);
+ break;
case JTAG430: //Also JTAG430X, JTAG430X2
//Revert this when X2 support returns.
jtag430x2handle(app,verb,len);