\brief JTAG handler functions for the ARM7TDMI family of processors
*/
-#include "jtag.h"
+#ifndef JTAGARM7_H
+#define JTAGARM7_H
+#include "app.h"
+
+#define JTAGARM7 0x13
#define JTAGSTATE_ARM 0 // bit 4 on dbg status reg is low
#define JTAGSTATE_THUMB 1
-unsigned char current_chain;
-unsigned char current_dbgstate = -1;
-//unsigned char last_halt_debug_state = -1;
-//unsigned long last_halt_pc = -1;
-
+// JTAG TAP states
+#define Exit2_DR 0x0
+#define Exit_DR 0x1
+#define Shift_DR 0x2
+#define Pause_DR 0x3
+#define Select_IR 0x4
+#define Update_DR 0x5
+#define Capture_DR 0x6
+#define Select_DR 0x7
+#define Exit2_IR 0x8
+#define Exit_IR 0x9
+#define Shift_IR 0xa
+#define Pause_IR 0xb
+#define RunTest_Idle 0xc
+#define Update_IR 0xd
+#define Capture_IR 0xe
+#define Test_Reset 0xf
// JTAGARM7 Commands
//JTAGARM7TDMI commands
-#define JTAGARM7_GET_REGISTER 0x87
-#define JTAGARM7_SET_REGISTER 0x88
-#define JTAGARM7_DEBUG_INSTR 0x89
+#define JTAGARM7_GET_REGISTER 0x8d
+#define JTAGARM7_SET_REGISTER 0x8e
+#define JTAGARM7_DEBUG_INSTR 0x8f
// Really ARM specific stuff
#define JTAGARM7_SET_IR 0x90
#define JTAGARM7_WAIT_DBG 0x91
#define JTAGARM7_SCANCHAIN1 0x94
#define JTAGARM7_EICE_READ 0x95
#define JTAGARM7_EICE_WRITE 0x96
+#define JTAGARM7_IR_SIZE 0x9f
+#define JTAGARM7_SCAN_N_SIZE 0x9e
// for deeper understanding, read the instruction cycle timing section of:
#define JTAG_ARM7TDMI_DBG_cgenL 8
#define JTAG_ARM7TDMI_DBG_TBIT 16
+extern app_t const jtagarm7_app;
+extern unsigned char g_jtag_ir_size;
+extern unsigned char g_jtagarm_scan_n_bitsize;
+
+#endif // JTAGARM7_H
+