updates.

[goodfet] / firmware / include / jtagarm7tdmi.h

diff --git a/firmware/include/jtagarm7tdmi.h b/firmware/include/jtagarm7tdmi.h
index 639f969..3e2045d 100644 (file)
--- a/firmware/include/jtagarm7tdmi.h
+++ b/firmware/include/jtagarm7tdmi.h
@@ -1,5 +1,4 @@
 /*! \file jtagarm7tdmi.h
-  \author Matthew Carpenter <matt@inguardians.com>
   \brief JTAG handler functions for the ARM7TDMI family of processors
 */
 
@@ -16,8 +15,8 @@
 
 
 
-unsigned long registers[16];   // constant array 
 unsigned char current_chain;
+unsigned char current_dbgstate = -1;
 unsigned char last_halt_debug_state = -1;
 unsigned long last_halt_pc = -1;
 unsigned long count_dbgspd_instr_since_debug = 0;
@@ -43,7 +42,7 @@ unsigned long jtagarm7tdmi_haltcpu();
 unsigned long jtagarm7tdmi_releasecpu();
 
 //! Set the program counter.
-unsigned long jtagarm7tdmi_setpc(unsigned long adr);
+void jtagarm7tdmi_setpc(unsigned long adr);
 
 //! Write data to address.
 unsigned long jtagarm7tdmi_writeflash(unsigned long adr, unsigned long data);
@@ -65,6 +64,10 @@ unsigned long jtagarm7tdmi_idcode();
 unsigned char jtagarm7tdmi_bypass();
 //!  Connect the appropriate scan chain to TDO/TDI
 unsigned long jtagarm7tdmi_scan_intest(int n);
+//!  Set a 32-bit ARM register
+void jtagarm7tdmi_set_register(unsigned long reg, unsigned long val);
+//!  Get a 32-bit ARM register
+unsigned long jtagarm7tdmi_get_register(unsigned long reg);
 
 // ARM7TDMI-specific pins
 // DBGRQ - GoodFET Pin 8
@@ -167,32 +170,40 @@ The least significant bit of the instruction register is scanned in and scanned
 #define JTAGARM7TDMI_SET_SPSR             0x9b
 #define JTAGARM7TDMI_SET_MODE_THUMB       0x9c
 #define JTAGARM7TDMI_SET_MODE_ARM         0x9d
+#define JTAGARM7TDMI_SET_IR               0x9e
+#define JTAGARM7TDMI_WAIT_DBG             0x9f
+#define JTAGARM7TDMI_SHIFT_DR             0xa0
+#define JTAGARM7TDMI_SETWATCH0            0xa1
+#define JTAGARM7TDMI_SETWATCH1            0xa2
+#define JTAGARM7TDMI_CHAIN0               0xa3
 
 
 // for deeper understanding, read the instruction cycle timing section of: 
 //      http://www.atmel.com/dyn/resources/prod_documents/DDI0029G_7TDMI_R3_trm.pdf
-#define EXECNOPARM                  0xe1a00000
-#define ARM_INSTR_NOP               0xe1a00000
-#define ARM_INSTR_STR_Rx_r14        0xe58e0000
+#define EXECNOPARM                  0xe1a00000L
+#define ARM_INSTR_NOP               0xe1a00000L
+#define ARM_INSTR_BX_R0             0xe12fff10L
+#define ARM_INSTR_STR_Rx_r14        0xe58f0000L // from atmel docs
 #define ARM_READ_REG                ARM_INSTR_STR_Rx_r14
-#define ARM_INSTR_LDR_Rx_r14        0xe59e0000
+#define ARM_INSTR_LDR_Rx_r14        0xe59f0000L // from atmel docs
 #define ARM_WRITE_REG               ARM_INSTR_LDR_Rx_r14
-#define ARM_INSTR_LDR_R1_r0_4       0xe4901004
+#define ARM_INSTR_LDR_R1_r0_4       0xe4901004L
 #define ARM_READ_MEM                ARM_INSTR_LDR_R1_r0_4
-#define ARM_INSTR_MRS_R0_CPSR       0xf10f0000
-#define ARM_INSTR_MSR_cpsr_cxsf_R0  0xe12ff000
-#define ARM_INSTR_STM_R0_r0_r15     0x 
-#define ARM_INSTR_STMIA_R14_r0_rx   0xE88E0000      // add up to 65k to indicate which registers...
-//   #define ARM_INSTR_STMIA_R14_r0_rx   0x00008ee8      // add up to 65k to indicate which registers...
-#define ARM_INSTR_SKANKREGS         0xE88Effff      // add up to 65k to indicate which registers...
-#define ARM_STORE_MULTIPLE          ARM_INSTR_STMIA_R14_r0-rx
-
-#define ARM_INSTR_B_PC              0xea000000
-#define ARM_INSTR_BX_PC             0xe1200010      // need to set r0 to the desired address
-#define THUMB_INSTR_STR_R0_r0       0x60006000
-#define THUMB_INSTR_MOV_R0_PC       0x46b846b8
-#define THUMB_INSTR_BX_PC           0x47784778
-#define THUMB_INSTR_NOP             0x1c001c00
+#define ARM_INSTR_STR_R1_r0_4       0xe4801004L
+#define ARM_WRITE_MEM               ARM_INSTR_STR_R1_r0_4
+#define ARM_INSTR_MRS_R0_CPSR       0xe10f0000L
+#define ARM_INSTR_MSR_cpsr_cxsf_R0  0xe12ff000L
+#define ARM_INSTR_STMIA_R14_r0_rx   0xE88E0000L      // add up to 65k to indicate which registers...
+#define ARM_STORE_MULTIPLE          ARM_INSTR_STMIA_R14_r0_rx
+#define ARM_INSTR_SKANKREGS         0xE88F7fffL
+#define ARM_INSTR_CLOBBEREGS        0xE89F7fffL
+
+#define ARM_INSTR_B_IMM             0xea000000L
+#define ARM_INSTR_BX_PC             0xe12fff10L      // need to set r0 to the desired address
+#define THUMB_INSTR_STR_R0_r0       0x60006000L
+#define THUMB_INSTR_MOV_R0_PC       0x46b846b8L
+#define THUMB_INSTR_BX_PC           0x47784778L
+#define THUMB_INSTR_NOP             0x1c001c00L
 #define ARM_REG_PC                  15
 
 #define JTAG_ARM7TDMI_DBG_DBGACK    1