-unsigned long registers[16]; // constant array
unsigned char current_chain;
-unsigned char last_halt_debug_state = -1;
-unsigned long last_halt_pc = -1;
-unsigned long count_dbgspd_instr_since_debug = 0;
-unsigned long count_sysspd_instr_since_debug = 0;
+unsigned char current_dbgstate = -1;
+//unsigned char last_halt_debug_state = -1;
+//unsigned long last_halt_pc = -1;
-void jtag_goto_shift_ir();
-void jtag_goto_shift_dr();
-void jtag_reset_to_runtest_idle();
-void jtag_arm_tcktock();
+//void jtag_goto_shift_ir();
+//void jtag_goto_shift_dr();
+//void jtag_reset_to_runtest_idle();
+//void jtag_arm_tcktock();
// JTAGARM7TDMI Commands
unsigned long jtagarm7tdmi_releasecpu();
//! Set the program counter.
-unsigned long jtagarm7tdmi_setpc(unsigned long adr);
+void jtagarm7tdmi_setpc(unsigned long adr);
//! Write data to address.
unsigned long jtagarm7tdmi_writeflash(unsigned long adr, unsigned long data);
//! Start JTAG
-unsigned long jtagarm7tdmi_start(void);
+void jtagarm7tdmi_start(void);
//! Reset TAP State Machine
void jtagarm7tdmi_resettap();
unsigned char jtagarm7tdmi_bypass();
//! Connect the appropriate scan chain to TDO/TDI
unsigned long jtagarm7tdmi_scan_intest(int n);
+//! Set a 32-bit ARM register
+void jtagarm7tdmi_set_register(unsigned long reg, unsigned long val);
+//! Get a 32-bit ARM register
+unsigned long jtagarm7tdmi_get_register(unsigned long reg);
// ARM7TDMI-specific pins
// DBGRQ - GoodFET Pin 8
#define EICE_WP1CTRLMASK 21
-#define NOEND 0
-#define END 1
-#define MSB 0
-#define LSB 1
-#define NORETIDLE 0
-#define RETIDLE 1
-
-
//JTAGARM7TDMI commands
-#define JTAGARM7TDMI_GET_DEBUG_CTRL 0x80
-#define JTAGARM7TDMI_SET_DEBUG_CTRL 0x81
-#define JTAGARM7TDMI_GET_PC 0x82
-#define JTAGARM7TDMI_SET_PC 0x83
-#define JTAGARM7TDMI_GET_CHIP_ID 0x84
-#define JTAGARM7TDMI_GET_DEBUG_STATE 0x85
-#define JTAGARM7TDMI_GET_WATCHPOINT 0x86
-#define JTAGARM7TDMI_SET_WATCHPOINT 0x87
-#define JTAGARM7TDMI_GET_REGISTER 0x88
-#define JTAGARM7TDMI_SET_REGISTER 0x89
-#define JTAGARM7TDMI_GET_REGISTERS 0x8a
-#define JTAGARM7TDMI_SET_REGISTERS 0x8b
-#define JTAGARM7TDMI_HALTCPU 0x8c
-#define JTAGARM7TDMI_RELEASECPU 0x8d
-#define JTAGARM7TDMI_DEBUG_INSTR 0x8e
-#define JTAGARM7TDMI_STEP_INSTR 0x8f
-#define JTAGARM7TDMI_WRITEMEM 0x90
-#define JTAGARM7TDMI_READMEM 0x91
-#define JTAGARM7TDMI_WRITE_FLASH_PAGE 0x92
-#define JTAGARM7TDMI_READ_FLASH_PAGE 0x93
-#define JTAGARM7TDMI_MASS_ERASE_FLASH 0x94
-#define JTAGARM7TDMI_PROGRAM_FLASH 0x95
-#define JTAGARM7TDMI_LOCKCHIP 0x96
-#define JTAGARM7TDMI_CHIP_ERASE 0x97
+#define JTAGARM7_GET_REGISTER 0x87
+#define JTAGARM7_SET_REGISTER 0x88
+#define JTAGARM7_DEBUG_INSTR 0x89
// Really ARM specific stuff
-#define JTAGARM7TDMI_GET_CPSR 0x98
-#define JTAGARM7TDMI_SET_CPSR 0x99
-#define JTAGARM7TDMI_GET_SPSR 0x9a
-#define JTAGARM7TDMI_SET_SPSR 0x9b
-#define JTAGARM7TDMI_SET_MODE_THUMB 0x9c
-#define JTAGARM7TDMI_SET_MODE_ARM 0x9d
+#define JTAGARM7_SET_IR 0x90
+#define JTAGARM7_WAIT_DBG 0x91
+#define JTAGARM7_SHIFT_DR 0x92
+#define JTAGARM7_CHAIN0 0x93
+#define JTAGARM7_SCANCHAIN1 0x94
+#define JTAGARM7_EICE_READ 0x95
+#define JTAGARM7_EICE_WRITE 0x96
// for deeper understanding, read the instruction cycle timing section of:
// http://www.atmel.com/dyn/resources/prod_documents/DDI0029G_7TDMI_R3_trm.pdf
-#define EXECNOPARM 0xe1a00000
-#define ARM_INSTR_NOP 0xe1a00000
-#define ARM_INSTR_STR_Rx_r14 0xe58e0000
+#define EXECNOPARM 0xe1a00000L
+#define ARM_INSTR_NOP 0xe1a00000L
+#define ARM_INSTR_BX_R0 0xe12fff10L
+#define ARM_INSTR_STR_Rx_r14 0xe58f0000L // from atmel docs
#define ARM_READ_REG ARM_INSTR_STR_Rx_r14
-#define ARM_INSTR_LDR_Rx_r14 0xe59e0000
+#define ARM_INSTR_LDR_Rx_r14 0xe59f0000L // from atmel docs
#define ARM_WRITE_REG ARM_INSTR_LDR_Rx_r14
-#define ARM_INSTR_LDR_R1_r0_4 0xe4901004
+#define ARM_INSTR_LDR_R1_r0_4 0xe4901004L
#define ARM_READ_MEM ARM_INSTR_LDR_R1_r0_4
-#define ARM_INSTR_MRS_R0_CPSR 0xf10f0000
-#define ARM_INSTR_MSR_cpsr_cxsf_R0 0xe12ff000
-#define ARM_INSTR_STM_R0_r0_r15 0x
-#define ARM_INSTR_STMIA_R14_r0_rx 0xE88E0000 // add up to 65k to indicate which registers...
-#define ARM_STORE_MULTIPLE ARM_INSTR_STMIA_R14_r0-rx
-#define ARM_INSTR_SKANKREGS 0xE88Effff
-#define ARM_INSTR_CLOBBEREGS 0xE88Effff
-
-#define ARM_INSTR_B_PC 0xea000000
-#define ARM_INSTR_BX_PC 0xe1200010 // need to set r0 to the desired address
-#define THUMB_INSTR_STR_R0_r0 0x60006000
-#define THUMB_INSTR_MOV_R0_PC 0x46b846b8
-#define THUMB_INSTR_BX_PC 0x47784778
-#define THUMB_INSTR_NOP 0x1c001c00
+#define ARM_INSTR_STR_R1_r0_4 0xe4801004L
+#define ARM_WRITE_MEM ARM_INSTR_STR_R1_r0_4
+#define ARM_INSTR_MRS_R0_CPSR 0xe10f0000L
+#define ARM_INSTR_MSR_cpsr_cxsf_R0 0xe12ff000L
+#define ARM_INSTR_STMIA_R14_r0_rx 0xE88E0000L // add up to 65k to indicate which registers...
+#define ARM_STORE_MULTIPLE ARM_INSTR_STMIA_R14_r0_rx
+#define ARM_INSTR_SKANKREGS 0xE88F7fffL
+#define ARM_INSTR_CLOBBEREGS 0xE89F7fffL
+
+#define ARM_INSTR_B_IMM 0xea000000L
+#define ARM_INSTR_BX_PC 0xe12fff10L // need to set r0 to the desired address
+#define THUMB_INSTR_STR_R0_r0 0x60006000L
+#define THUMB_INSTR_MOV_R0_PC 0x46b846b8L
+#define THUMB_INSTR_BX_PC 0x47784778L
+#define THUMB_INSTR_NOP 0x1c001c00L
#define ARM_REG_PC 15
#define JTAG_ARM7TDMI_DBG_DBGACK 1
projects / goodfet / blobdiff