Add note about another tested PIC target: PIC24FJ64GA002

[goodfet] / firmware / include / spi.h

diff --git a/firmware/include/spi.h b/firmware/include/spi.h
index f5c0d8e..590db0e 100644 (file)
--- a/firmware/include/spi.h
+++ b/firmware/include/spi.h
@@ -5,20 +5,23 @@
 
 
 //Pins and I/O
-#define SS   BIT0
+//#define SS BIT0
 #define MOSI BIT1
 #define MISO BIT2
 #define SCK  BIT3
 
-#define SETSS P5OUT|=SS
-#define CLRSS P5OUT&=~SS
-
 #define SETMOSI P5OUT|=MOSI
 #define CLRMOSI P5OUT&=~MOSI
 #define SETCLK P5OUT|=SCK
 #define CLRCLK P5OUT&=~SCK
 #define READMISO (P5IN&MISO?1:0)
 
+#define SETTST P4OUT|=TST
+#define CLRTST P4OUT&=~TST
+#define SETRST P2OUT|=RST
+#define CLRRST P2OUT&=~RST
+
+
 //! Set up the pins for SPI mode.
 void spisetup();
 
@@ -35,3 +38,14 @@ void spiflash_peekblock(unsigned long adr,
 void spiflash_pokeblocks(unsigned long adr,
                         unsigned char *buf,
                         unsigned int len);
+
+
+//! Enable SPI writing
+void spiflash_wrten();
+
+//! Read and write an SPI byte.
+unsigned char spitrans8(unsigned char byte);
+//! Grab the SPI flash status byte.
+unsigned char spiflash_status();
+//! Erase a sector.
+void spiflash_erasesector(unsigned long adr);