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Early support for 2254 on the GoodFET30.
[goodfet]
/
firmware
/
lib
/
msp430x1612.c
diff --git
a/firmware/lib/msp430x1612.c
b/firmware/lib/msp430x1612.c
index
e1d03a7
..
ab8c76e
100644
(file)
--- a/
firmware/lib/msp430x1612.c
+++ b/
firmware/lib/msp430x1612.c
@@
-6,7
+6,6
@@
#include <io.h>
#include <iomacros.h>
#include <io.h>
#include <iomacros.h>
-
//! Receive a byte.
unsigned char serial_rx(){
char c;
//! Receive a byte.
unsigned char serial_rx(){
char c;
@@
-31,7
+30,6
@@
unsigned char serial1_rx(){
return c;
}
return c;
}
-
//! Transmit a byte.
void serial_tx(unsigned char x){
while ((IFG1 & UTXIFG0) == 0); //loop until buffer is free
//! Transmit a byte.
void serial_tx(unsigned char x){
while ((IFG1 & UTXIFG0) == 0); //loop until buffer is free
@@
-74,20
+72,20
@@
void setbaud1(unsigned char rate){
//http://mspgcc.sourceforge.net/baudrate.html
switch(rate){
case 1://9600 baud
//http://mspgcc.sourceforge.net/baudrate.html
switch(rate){
case 1://9600 baud
- UBR01=0x7F; UBR11=0x01; UMCTL1=0x5B; /* uart0 3683400Hz 9599bps */
+
//
UBR01=0x7F; UBR11=0x01; UMCTL1=0x5B; /* uart0 3683400Hz 9599bps */
break;
case 2://19200 baud
break;
case 2://19200 baud
- UBR01=0xBF; UBR11=0x00; UMCTL1=0xF7; /* uart0 3683400Hz 19194bps */
+
//
UBR01=0xBF; UBR11=0x00; UMCTL1=0xF7; /* uart0 3683400Hz 19194bps */
break;
case 3://38400 baud
break;
case 3://38400 baud
- UBR01=0x5F; UBR11=0x00; UMCTL1=0xBF; /* uart0 3683400Hz 38408bps */
+
//
UBR01=0x5F; UBR11=0x00; UMCTL1=0xBF; /* uart0 3683400Hz 38408bps */
break;
case 4://57600 baud
break;
case 4://57600 baud
- UBR01=0x40; UBR11=0x00; UMCTL1=0x00; /* uart0 3683400Hz 57553bps */
+
//
UBR01=0x40; UBR11=0x00; UMCTL1=0x00; /* uart0 3683400Hz 57553bps */
break;
default:
case 5://115200 baud
break;
default:
case 5://115200 baud
- UBR01=0x20; UBR11=0x00; UMCTL1=0x00; /* uart0 3683400Hz 115106bps */
+
//
UBR01=0x20; UBR11=0x00; UMCTL1=0x00; /* uart0 3683400Hz 115106bps */
break;
}
}
break;
}
}
@@
-95,6
+93,8
@@
void setbaud1(unsigned char rate){
void msp430_init_uart(){
void msp430_init_uart(){
+ /* RS232 */
+
P3SEL |= BIT4|BIT5; // P3.4,5 = USART0 TXD/RXD
P3DIR |= BIT4;
P3SEL |= BIT4|BIT5; // P3.4,5 = USART0 TXD/RXD
P3DIR |= BIT4;
@@
-103,7
+103,6
@@
void msp430_init_uart(){
setbaud(0);
setbaud(0);
- //Necessary for bit-banging, switch to hardware for performance.
ME1 &= ~USPIE0; /* USART1 SPI module disable */
ME1 |= (UTXE0 | URXE0); /* Enable USART1 TXD/RXD */
ME1 &= ~USPIE0; /* USART1 SPI module disable */
ME1 |= (UTXE0 | URXE0); /* Enable USART1 TXD/RXD */
@@
-118,7
+117,7
@@
void msp430_init_uart(){
void msp430_init_dco() {
void msp430_init_dco() {
-
/* This code taken from the FU Berlin sources and reformatted. */
+/* This code taken from the FU Berlin sources and reformatted. */
//
//Works well.
//
//Works well.
@@
-191,5
+190,6
@@
void msp430_init_dco() {
BCSCTL1 &= ~(DIVA1 + DIVA0); /* remove /8 divisor from ACLK again */
P1OUT=0;
BCSCTL1 &= ~(DIVA1 + DIVA0); /* remove /8 divisor from ACLK again */
P1OUT=0;
+
}
}