//http://mspgcc.sourceforge.net/baudrate.html
switch(rate){
case 1://9600 baud
- UBR01=0x7F; UBR11=0x01; UMCTL1=0x5B; /* uart0 3683400Hz 9599bps */
+ // UBR01=0x7F; UBR11=0x01; UMCTL1=0x5B; /* uart0 3683400Hz 9599bps */
break;
case 2://19200 baud
- UBR01=0xBF; UBR11=0x00; UMCTL1=0xF7; /* uart0 3683400Hz 19194bps */
+ //UBR01=0xBF; UBR11=0x00; UMCTL1=0xF7; /* uart0 3683400Hz 19194bps */
break;
case 3://38400 baud
- UBR01=0x5F; UBR11=0x00; UMCTL1=0xBF; /* uart0 3683400Hz 38408bps */
+ //UBR01=0x5F; UBR11=0x00; UMCTL1=0xBF; /* uart0 3683400Hz 38408bps */
break;
case 4://57600 baud
- UBR01=0x40; UBR11=0x00; UMCTL1=0x00; /* uart0 3683400Hz 57553bps */
+ //UBR01=0x40; UBR11=0x00; UMCTL1=0x00; /* uart0 3683400Hz 57553bps */
break;
default:
case 5://115200 baud
- UBR01=0x20; UBR11=0x00; UMCTL1=0x00; /* uart0 3683400Hz 115106bps */
+ //UBR01=0x20; UBR11=0x00; UMCTL1=0x00; /* uart0 3683400Hz 115106bps */
break;
}
}
void msp430_init_uart(){
+ /* RS232 */
+
P3SEL |= BIT4|BIT5; // P3.4,5 = USART0 TXD/RXD
P3DIR |= BIT4;
setbaud(0);
- //Necessary for bit-banging, switch to hardware for performance.
ME1 &= ~USPIE0; /* USART1 SPI module disable */
ME1 |= (UTXE0 | URXE0); /* Enable USART1 TXD/RXD */
void msp430_init_dco() {
- /* This code taken from the FU Berlin sources and reformatted. */
+/* This code taken from the FU Berlin sources and reformatted. */
//
//Works well.
BCSCTL1 &= ~(DIVA1 + DIVA0); /* remove /8 divisor from ACLK again */
P1OUT=0;
+
}